JPS5614753A - Relay supervisory system - Google Patents

Abstract

PURPOSE:To exercise a supervision over the state of a relay all the time with a lessened influence on a main signal of binary RZ codes, by sending the main signal while an error detection pattern signal is inserted between bits of the main signal. CONSTITUTION:To input terminal 4, NRZ code data (a) is input and to input terminal 5, clock (b) is also input; and RZ code signal (c) is output from NRZ-RZ converting circuit 1, error check pattern signal (d) is output from error check pattern generator 2, and composite signal (e) of signals (c) and (d) is output from OR circuit 3. This signal (e) is amplified by amplifier 11 and clock (f) is extracted by timing extracting circuit 12 and then applied to clock terminal (c) of FF15. Further, clock (f) is multiplied by two at multiplying circuit 13, whose output is input to terminal C of FF14 and output signal (f) from terminal Q of FF14 is changed into the same pattern with signal (e) and sent to the following repeater, etc. Furthermore, signal (h) is sent to data terminal D of FF15, the output of which is applied to terminal C of FF16, whose output (j) is applied to the repeater by way of BPF, exercising a supervision over its operation all the time.