JPS56147533A - Light receiving and amplifying circuit - Google Patents

Light receiving and amplifying circuit

Info

Publication number
JPS56147533A
JPS56147533A JP5084780A JP5084780A JPS56147533A JP S56147533 A JPS56147533 A JP S56147533A JP 5084780 A JP5084780 A JP 5084780A JP 5084780 A JP5084780 A JP 5084780A JP S56147533 A JPS56147533 A JP S56147533A
Authority
JP
Japan
Prior art keywords
output
circuit
input
resistance value
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5084780A
Other languages
Japanese (ja)
Inventor
Kazuo Nishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5084780A priority Critical patent/JPS56147533A/en
Publication of JPS56147533A publication Critical patent/JPS56147533A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/60—Receivers
    • H04B10/66—Non-coherent receivers, e.g. using direct detection
    • H04B10/69—Electrical arrangements in the receiver
    • H04B10/697—Arrangements for reducing noise and distortion
    • H04B10/6973—Arrangements for reducing noise and distortion using noise matching networks

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To extend the permissible variation range of optical signal power without waveform distortion, by controlling the resistance value of the load resistance circuit through the reception of the output of the voltage amplitude level detecting circuit with the load resistance value controlling circuit. CONSTITUTION:The multiplication factor of the photodiode 1 is controlled with the control signal F by the amplification factor controlling circuit 6 at the region where the power of the optical signal input A is small, and the output from the amplifier circuit 3 is kept constant. At the region where the upper limit P1 of the input A is exceeded, the gain of the circuit 3 is controlled with the gain control circuit 5 and the output C is kept constant. The output B voltage from the load resistance circuit 2 is increased as the input A increases. For the input A region where the optical signal input P2 giving the upper limit VLS of the output B voltage producing the waveform distortion to the output C is exceeded, the resistance value of the circuit 2 is controlled with the normal resistance value controlling signal G from the circuit 6 and the output C is kept constant. In this case, since the output B voltage is suppressed to the upper limit VLS, no waveform distortion is caused to the output C.
JP5084780A 1980-04-17 1980-04-17 Light receiving and amplifying circuit Pending JPS56147533A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5084780A JPS56147533A (en) 1980-04-17 1980-04-17 Light receiving and amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5084780A JPS56147533A (en) 1980-04-17 1980-04-17 Light receiving and amplifying circuit

Publications (1)

Publication Number Publication Date
JPS56147533A true JPS56147533A (en) 1981-11-16

Family

ID=12870106

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5084780A Pending JPS56147533A (en) 1980-04-17 1980-04-17 Light receiving and amplifying circuit

Country Status (1)

Country Link
JP (1) JPS56147533A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114610A (en) * 1984-11-08 1986-06-02 Mitsubishi Electric Corp Dc amplifier with automatic gain control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61114610A (en) * 1984-11-08 1986-06-02 Mitsubishi Electric Corp Dc amplifier with automatic gain control
JPH0356482B2 (en) * 1984-11-08 1991-08-28

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