JPS56137570A - Data processor - Google Patents
Data processorInfo
- Publication number
- JPS56137570A JPS56137570A JP4022380A JP4022380A JPS56137570A JP S56137570 A JPS56137570 A JP S56137570A JP 4022380 A JP4022380 A JP 4022380A JP 4022380 A JP4022380 A JP 4022380A JP S56137570 A JPS56137570 A JP S56137570A
- Authority
- JP
- Japan
- Prior art keywords
- zone
- data
- register
- digit
- registers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- General Engineering & Computer Science (AREA)
Abstract
PURPOSE:To make efficient the data processing of an unpack form, by processing the zone and digit part of a byte data with lach of two sets of registers. CONSTITUTION:The hexadecimal number, e.g., 3 corresponding to the zone loaded to the logical operation circuit 9 is stored in the zone register 7Z of the register 4. Then, the data of the form of zone Zn and digit Dn in one byte unit is read out from the main memory 1 with the access request of CPU3. Further, the gate is controlled with the set of register stored and written in FF in advance, and digits are written in and stored in the digit section register D with the switching signal 12D and clock signal 13D. Thus, the data is normalized with registers 7Z, 7D and the data is written in the memory 1 until it reaches the designated length. The data processing time of zone section is reduced with the system processing the zone and digit through the use of registers of two sets and 4-bit, allowing to efficiently make the data processing of the unpack form.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4022380A JPS56137570A (en) | 1980-03-31 | 1980-03-31 | Data processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4022380A JPS56137570A (en) | 1980-03-31 | 1980-03-31 | Data processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56137570A true JPS56137570A (en) | 1981-10-27 |
Family
ID=12574753
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4022380A Pending JPS56137570A (en) | 1980-03-31 | 1980-03-31 | Data processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56137570A (en) |
-
1980
- 1980-03-31 JP JP4022380A patent/JPS56137570A/en active Pending
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