JPS56134385A - Buffer circuit - Google Patents

Buffer circuit

Info

Publication number
JPS56134385A
JPS56134385A JP3490680A JP3490680A JPS56134385A JP S56134385 A JPS56134385 A JP S56134385A JP 3490680 A JP3490680 A JP 3490680A JP 3490680 A JP3490680 A JP 3490680A JP S56134385 A JPS56134385 A JP S56134385A
Authority
JP
Japan
Prior art keywords
ttl
inputs
signals
reference voltage
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3490680A
Other languages
Japanese (ja)
Other versions
JPS6030038B2 (en
Inventor
Masaru Uesugi
Yoshihisa Obara
Nobuaki Ieda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP55034906A priority Critical patent/JPS6030038B2/en
Publication of JPS56134385A publication Critical patent/JPS56134385A/en
Publication of JPS6030038B2 publication Critical patent/JPS6030038B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To increase a potential difference between a TTL level input signal and reference voltage by providing each Transistor Transistor Logic (TTL) buffer circuit with a reference voltage generating circuit which receives a TTL level input signal. CONSTITUTION:Respective TTL buffer circuits A1, A2... are provided with reference voltage generators C1... which receive TTL inputs B1..., and generators C1 generate reference signals D1... mediating nearly between inputs B1... and voltages of phase reversed to them. Therefore, even if inputs B1... fluctuate, differences between inputs B1... and signals D1... are not decreased but increased. As a result, the operation margin of the TTL buffer circuits provided with sense amplifiers F1..., which compare and amplify the TTL inputs and reference signals and then output complementary sense signals, increases.
JP55034906A 1980-03-21 1980-03-21 buffer circuit Expired JPS6030038B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55034906A JPS6030038B2 (en) 1980-03-21 1980-03-21 buffer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55034906A JPS6030038B2 (en) 1980-03-21 1980-03-21 buffer circuit

Publications (2)

Publication Number Publication Date
JPS56134385A true JPS56134385A (en) 1981-10-21
JPS6030038B2 JPS6030038B2 (en) 1985-07-13

Family

ID=12427228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55034906A Expired JPS6030038B2 (en) 1980-03-21 1980-03-21 buffer circuit

Country Status (1)

Country Link
JP (1) JPS6030038B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3716754A1 (en) * 1986-05-19 1987-11-26 Toshiba Kawasaki Kk SEMICONDUCTOR INQUIRY CIRCUIT, SUITABLE FOR INTERMEDIATE CIRCUIT IN A SEMICONDUCTOR MEMORY CHIP

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63179534U (en) * 1987-05-01 1988-11-21

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3716754A1 (en) * 1986-05-19 1987-11-26 Toshiba Kawasaki Kk SEMICONDUCTOR INQUIRY CIRCUIT, SUITABLE FOR INTERMEDIATE CIRCUIT IN A SEMICONDUCTOR MEMORY CHIP
US4764693A (en) * 1986-05-19 1988-08-16 Kabushiki Kaisha Toshiba Semiconductor sense circuit suitable for buffer circuit in semiconductor memory chip

Also Published As

Publication number Publication date
JPS6030038B2 (en) 1985-07-13

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