JPS56133675A - Timer device - Google Patents

Timer device

Info

Publication number
JPS56133675A
JPS56133675A JP3776580A JP3776580A JPS56133675A JP S56133675 A JPS56133675 A JP S56133675A JP 3776580 A JP3776580 A JP 3776580A JP 3776580 A JP3776580 A JP 3776580A JP S56133675 A JPS56133675 A JP S56133675A
Authority
JP
Japan
Prior art keywords
circuit
frequency
output
timer
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3776580A
Other languages
Japanese (ja)
Inventor
Mitsuo Yokomori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba TEC Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Priority to JP3776580A priority Critical patent/JPS56133675A/en
Publication of JPS56133675A publication Critical patent/JPS56133675A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F5/00Apparatus for producing preselected time intervals for use as timing standards
    • G04F5/02Metronomes
    • G04F5/025Electronic metronomes

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Predetermined Time Intervals (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To reduce the space of fitting by installing two timer circuits, which turn on and off repeatedly at optional intervals of time, in one housing. CONSTITUTION:Oscillating circuit 20a oscillates at a frequency based upon a time constant set by time constant circuit 27a, frequency dividing circuit 21a divides the frequency at a frequency division ratio set with frequency-division ratio change- over switch 29a, and counting circuit 22a counts its output pulses. Then, when the counte value reaches a set value, the output of output terminal 30a is inverted to level L and while the excitation of relay 37 is released, the output of output termina 31a is inverted to level H, so that while the 1st timer circuit 18 is reset, the counting operation of the 2nd timer circuit 19 will be started. Then, when the count value of counting circuit 22b reaches a set value, the 1st timer circuit 18 is allowed to count up and relay 37 is excited.
JP3776580A 1980-03-25 1980-03-25 Timer device Pending JPS56133675A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3776580A JPS56133675A (en) 1980-03-25 1980-03-25 Timer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3776580A JPS56133675A (en) 1980-03-25 1980-03-25 Timer device

Publications (1)

Publication Number Publication Date
JPS56133675A true JPS56133675A (en) 1981-10-19

Family

ID=12506558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3776580A Pending JPS56133675A (en) 1980-03-25 1980-03-25 Timer device

Country Status (1)

Country Link
JP (1) JPS56133675A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6395328U (en) * 1986-12-10 1988-06-20
JPS6421528U (en) * 1987-07-28 1989-02-02

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6395328U (en) * 1986-12-10 1988-06-20
JPS6421528U (en) * 1987-07-28 1989-02-02

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