JPS56132062A - Video signal processing circuit - Google Patents

Video signal processing circuit

Info

Publication number
JPS56132062A
JPS56132062A JP3551780A JP3551780A JPS56132062A JP S56132062 A JPS56132062 A JP S56132062A JP 3551780 A JP3551780 A JP 3551780A JP 3551780 A JP3551780 A JP 3551780A JP S56132062 A JPS56132062 A JP S56132062A
Authority
JP
Japan
Prior art keywords
outputs
video signal
output
gate
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3551780A
Other languages
Japanese (ja)
Inventor
Katsuhiko Aoyanagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3551780A priority Critical patent/JPS56132062A/en
Publication of JPS56132062A publication Critical patent/JPS56132062A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/20—Image preprocessing
    • G06V10/30—Noise filtering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Closed-Circuit Television Systems (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To detect a pattern with a high precision without an expensive photoelectric conversion device, by correcting distortion of the video signal by a simple logical signal processing. CONSTITUTION:Binary video signal VS transmitted from the photoelectric conversion device is synchronized with clock signal CS by FF circuit 1, and binary video signal CVS from circuit 1 is supplied to shift register 2, and parallel outputs Q1-Q5 are output from register 2. These outputs Q1-Q5 from register 2 are applied to correcting circuit 3, and adjacent outputs Q1 and Q2 and outputs Q4 and Q5 out of these outputs Q1-Q5 are applied to AND gate 31 to operate their ANDs, and output A0 of gate 31 and output Q3 are operated for OR by OR gate 32. Output Q3 interposed between outputs Q1 and Q2 and outputs Q4 and Q5 is regarded as the error signal due to distortion of the video signal unconditionally and is corrected by output A0 of gate 31 automatically to output corrected video signal BVS, and thus, a high-precision pattern is detected with a simple constitution.
JP3551780A 1980-03-19 1980-03-19 Video signal processing circuit Pending JPS56132062A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3551780A JPS56132062A (en) 1980-03-19 1980-03-19 Video signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3551780A JPS56132062A (en) 1980-03-19 1980-03-19 Video signal processing circuit

Publications (1)

Publication Number Publication Date
JPS56132062A true JPS56132062A (en) 1981-10-16

Family

ID=12443939

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3551780A Pending JPS56132062A (en) 1980-03-19 1980-03-19 Video signal processing circuit

Country Status (1)

Country Link
JP (1) JPS56132062A (en)

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