JPS56117437A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS56117437A
JPS56117437A JP2021280A JP2021280A JPS56117437A JP S56117437 A JPS56117437 A JP S56117437A JP 2021280 A JP2021280 A JP 2021280A JP 2021280 A JP2021280 A JP 2021280A JP S56117437 A JPS56117437 A JP S56117437A
Authority
JP
Japan
Prior art keywords
transmitting
state
switch
pll circuit
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2021280A
Other languages
Japanese (ja)
Other versions
JPS5935534B2 (en
Inventor
Toyotaro Sawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55020212A priority Critical patent/JPS5935534B2/en
Publication of JPS56117437A publication Critical patent/JPS56117437A/en
Publication of JPS5935534B2 publication Critical patent/JPS5935534B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/44—Transmit/receive switching

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Transceivers (AREA)
  • Transmitters (AREA)

Abstract

PURPOSE:To prevent the occurrence of a disturbing electric wave for a PLL circuit that is used for a radio device of press-to-talk system, by discontinuing the operation of the transmitting VCO for a period during which the PLL circuit is switched to a transmitting state from a receiving state and then the transmitting reference oscillator has a steady working. CONSTITUTION:When the operator operates the press-to-talk switch to switch the receiving state to the transmitting state, the contact piece of the switch 1 is connected to the contact (a) by a coupling action. At and after this moment, the power is supplied to the transmitting reference oscillator 3 through the power supply line 2B. On the other hand, the power is supplied to the transmitting VCO4 via the delay circuit 15. Thus the VCO4 starts its oscillating action after the oscillator 3 is put under a steady working state. As a result, an illegal disturbance is never given to other stations.
JP55020212A 1980-02-20 1980-02-20 PLL circuit Expired JPS5935534B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55020212A JPS5935534B2 (en) 1980-02-20 1980-02-20 PLL circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55020212A JPS5935534B2 (en) 1980-02-20 1980-02-20 PLL circuit

Publications (2)

Publication Number Publication Date
JPS56117437A true JPS56117437A (en) 1981-09-14
JPS5935534B2 JPS5935534B2 (en) 1984-08-29

Family

ID=12020852

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55020212A Expired JPS5935534B2 (en) 1980-02-20 1980-02-20 PLL circuit

Country Status (1)

Country Link
JP (1) JPS5935534B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS635730U (en) * 1986-06-27 1988-01-14
JPH03113543U (en) * 1990-03-05 1991-11-20
JP2018110421A (en) * 2012-05-10 2018-07-12 サムスン エレクトロニクス カンパニー リミテッド Transceiver applying switching of phase locked loop and phase noise improvement technique

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS635730U (en) * 1986-06-27 1988-01-14
JPH0434589Y2 (en) * 1986-06-27 1992-08-18
JPH03113543U (en) * 1990-03-05 1991-11-20
JP2018110421A (en) * 2012-05-10 2018-07-12 サムスン エレクトロニクス カンパニー リミテッド Transceiver applying switching of phase locked loop and phase noise improvement technique

Also Published As

Publication number Publication date
JPS5935534B2 (en) 1984-08-29

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