JPS56110337A - Digital and analog converter - Google Patents

Digital and analog converter

Info

Publication number
JPS56110337A
JPS56110337A JP1251480A JP1251480A JPS56110337A JP S56110337 A JPS56110337 A JP S56110337A JP 1251480 A JP1251480 A JP 1251480A JP 1251480 A JP1251480 A JP 1251480A JP S56110337 A JPS56110337 A JP S56110337A
Authority
JP
Japan
Prior art keywords
electrode
output
integrator
input
conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1251480A
Other languages
Japanese (ja)
Inventor
Masaharu Ishigaki
Seiji Kishimoto
Takeshi Hazama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1251480A priority Critical patent/JPS56110337A/en
Publication of JPS56110337A publication Critical patent/JPS56110337A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/80Simultaneous conversion using weighted impedances

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To realize a direct D/A conversion without changing a serial pulse train into a parallel form is case a D/A conversion is given to the serial pulse train, by installing an elastic surface wave device and an analog integrator as the primary component elements. CONSTITUTION:The elastic surface wave device 1 contains the com-bshaped input and output electrodes 5 and 6 on the piezoelectric substrate 3, and the analog integrator integrates the output of the output electrode 6. The input electrode 5 consists of N pairs of normal electrodes (N>=1), and the electrode 6 has a logarithm of 6NXM (M>=2) to be formed into a weighted electrode having a fixed picth of the electrode fingers plus the crossing width of the electrode fingers varying at the rate of 1, 1, 2<i>...2<i> (i=1, 2...M-2) with every N pair and successively at and after the width closest to the input electrode. The means 7 is provided to the integrator 2 to perform a sampling in a state under which the outputs of the output electrode fingers have the same polarity. Then the digital signals are supplied successively from the electrode 5 and through the side of MSB, and thus a D/A- converted output is obtained from the integrator 2.
JP1251480A 1980-02-06 1980-02-06 Digital and analog converter Pending JPS56110337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1251480A JPS56110337A (en) 1980-02-06 1980-02-06 Digital and analog converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1251480A JPS56110337A (en) 1980-02-06 1980-02-06 Digital and analog converter

Publications (1)

Publication Number Publication Date
JPS56110337A true JPS56110337A (en) 1981-09-01

Family

ID=11807449

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1251480A Pending JPS56110337A (en) 1980-02-06 1980-02-06 Digital and analog converter

Country Status (1)

Country Link
JP (1) JPS56110337A (en)

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