JPS5610791A - Storage system for office information - Google Patents

Storage system for office information

Info

Publication number
JPS5610791A
JPS5610791A JP8545479A JP8545479A JPS5610791A JP S5610791 A JPS5610791 A JP S5610791A JP 8545479 A JP8545479 A JP 8545479A JP 8545479 A JP8545479 A JP 8545479A JP S5610791 A JPS5610791 A JP S5610791A
Authority
JP
Japan
Prior art keywords
memory element
read
office
semiconductor integrated
office information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8545479A
Other languages
Japanese (ja)
Other versions
JPS646600B2 (en
Inventor
Susumu Enokido
Takao Ono
Takahito Yanagimoto
Shigeki Nakauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP8545479A priority Critical patent/JPS5610791A/en
Publication of JPS5610791A publication Critical patent/JPS5610791A/en
Publication of JPS646600B2 publication Critical patent/JPS646600B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases

Abstract

PURPOSE:To make it easy to read and use office information required in a telephone switching connection by storing a dedicated memory element of a semiconductor integrated circuit with information varying with the state of the office and by exercising online control over the erasing, writing and reading of this memory element. CONSTITUTION:Subscriber SUB A or B is connected through main link ML to trunk TRK A for a toll call or to trunk TRK B for a local call. For connection control over those paths, central processor CPU serving as the base of an electric exchange reads instructions or data out of temporary memory element RAM, read- only memory element ROM and electrically-erasable and writable read-only semiconductor integrated-circuit memory EPROM and performs arithmetic processing to drive main link ML through switch controller SC. Office information required for telephone switching control is easily read by CPU in online mode and used.
JP8545479A 1979-07-05 1979-07-05 Storage system for office information Granted JPS5610791A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8545479A JPS5610791A (en) 1979-07-05 1979-07-05 Storage system for office information

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8545479A JPS5610791A (en) 1979-07-05 1979-07-05 Storage system for office information

Publications (2)

Publication Number Publication Date
JPS5610791A true JPS5610791A (en) 1981-02-03
JPS646600B2 JPS646600B2 (en) 1989-02-03

Family

ID=13859321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8545479A Granted JPS5610791A (en) 1979-07-05 1979-07-05 Storage system for office information

Country Status (1)

Country Link
JP (1) JPS5610791A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6124093A (en) * 1984-07-12 1986-02-01 Toppan Printing Co Ltd P-rom writer
JPH03187661A (en) * 1989-12-18 1991-08-15 Oki Electric Ind Co Ltd Program rewrite system
US10123414B2 (en) 2014-08-29 2018-11-06 Murata Manufacturing Co., Ltd. Multilayer circuit board using laser direct structuring additive

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6124093A (en) * 1984-07-12 1986-02-01 Toppan Printing Co Ltd P-rom writer
JPH03187661A (en) * 1989-12-18 1991-08-15 Oki Electric Ind Co Ltd Program rewrite system
US10123414B2 (en) 2014-08-29 2018-11-06 Murata Manufacturing Co., Ltd. Multilayer circuit board using laser direct structuring additive

Also Published As

Publication number Publication date
JPS646600B2 (en) 1989-02-03

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