JPS56107658A - Digital communication system - Google Patents
Digital communication systemInfo
- Publication number
- JPS56107658A JPS56107658A JP943080A JP943080A JPS56107658A JP S56107658 A JPS56107658 A JP S56107658A JP 943080 A JP943080 A JP 943080A JP 943080 A JP943080 A JP 943080A JP S56107658 A JPS56107658 A JP S56107658A
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- encoding
- signal
- modem4
- decoding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1623—Plesiochronous digital hierarchy [PDH]
- H04J3/1641—Hierarchical systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Time-Division Multiplex Systems (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE:To suppress an increase of a circuit scale of the terminal and get rid of a problem of delay time, by designating the transmission band which is used in common by plural terminals, the encoding and decoding speed of the encoder and decoder of each terminal, and the time position of the transmission and receiving signals, to each terminal from the station. CONSTITUTION:The MODEM4 receives a control channel in the down-circuit 5 at all times, transmits and receives control signals such as start, calling, communication start, end, etc., and also receives a data and decodes a transmission band designation signal, when the communication has started. In the course of communication, the encoding and decoding speed of the transmission and receiving data, and the time position of the signals are designated through the control channel. The variable length encoding the decoding equipment 1 decodes a demodulation signal 10 from the MODEM4 in accordance with various information, outputs it as decoding signal 11 to the interface circuit 2, also changes a data signal 12 from the device 2 to a variable length code, and outputs an encoding data signal 13 to the MODEM4. In this way, since the condition is set in accordance with a command from the station, in the terminal, an increase of the circuit scale of the buffer, etc. can be suppressed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP943080A JPS56107658A (en) | 1980-01-31 | 1980-01-31 | Digital communication system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP943080A JPS56107658A (en) | 1980-01-31 | 1980-01-31 | Digital communication system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56107658A true JPS56107658A (en) | 1981-08-26 |
Family
ID=11720110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP943080A Pending JPS56107658A (en) | 1980-01-31 | 1980-01-31 | Digital communication system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56107658A (en) |
-
1980
- 1980-01-31 JP JP943080A patent/JPS56107658A/en active Pending
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