JPS5610759A - Fault detecting system for signal bus - Google Patents

Fault detecting system for signal bus

Info

Publication number
JPS5610759A
JPS5610759A JP8624479A JP8624479A JPS5610759A JP S5610759 A JPS5610759 A JP S5610759A JP 8624479 A JP8624479 A JP 8624479A JP 8624479 A JP8624479 A JP 8624479A JP S5610759 A JPS5610759 A JP S5610759A
Authority
JP
Japan
Prior art keywords
circuit
output
bus
address bus
cpu
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8624479A
Other languages
Japanese (ja)
Other versions
JPS592050B2 (en
Inventor
Shoichi Abe
Yoshiji Ishibashi
Takao Ono
Masashi Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP54086244A priority Critical patent/JPS592050B2/en
Publication of JPS5610759A publication Critical patent/JPS5610759A/en
Publication of JPS592050B2 publication Critical patent/JPS592050B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To realize the fault detection for the address bus, by transmitting periodically the specific signal for the test of the address bus to the address bus from CPU and then testing the specific signal through the test circuit. CONSTITUTION:When CPU transmits the signals of AB0=AB2-AB14=''1'' and AB1=AB3-AB15=''0'' to address bus AB0-15, the outpts of exclusive logic sum circuit GTO are all ''1'' along with output A of NAND circuit GT1 turnd to ''0'' each. And output C of mono-multi M/M to which above-mentioned outputs are supplied turns to ''1''. Then when CPU transmits the signals of AB0-AB2-AB14= ''0'' and AB1-AB15=''1'' to the same bus, the outputs of exclusive logic sum circuit GT2 are all ''1''. And output B of inverter GT4 turns to ''1'' via NAND circuit GT3. Accordingly, the output of NAND circuit GT5 turns to ''0'', and timer circuit TM is reset. Thus the specific signal is transmitted periodically to bus AB0-15 from CPU. As a result, the fault of the bus can be detected in case the output exists in circuit TM.
JP54086244A 1979-07-06 1979-07-06 Signal bus failure detection method Expired JPS592050B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54086244A JPS592050B2 (en) 1979-07-06 1979-07-06 Signal bus failure detection method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54086244A JPS592050B2 (en) 1979-07-06 1979-07-06 Signal bus failure detection method

Publications (2)

Publication Number Publication Date
JPS5610759A true JPS5610759A (en) 1981-02-03
JPS592050B2 JPS592050B2 (en) 1984-01-17

Family

ID=13881392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54086244A Expired JPS592050B2 (en) 1979-07-06 1979-07-06 Signal bus failure detection method

Country Status (1)

Country Link
JP (1) JPS592050B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8140921B2 (en) * 2004-06-22 2012-03-20 Mitsubishi Electric Corporation System for elevator electronic safety device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105037A (en) * 1974-01-23 1975-08-19
JPS5324255A (en) * 1976-08-18 1978-03-06 Matsushita Electric Ind Co Ltd Waveform shaping circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105037A (en) * 1974-01-23 1975-08-19
JPS5324255A (en) * 1976-08-18 1978-03-06 Matsushita Electric Ind Co Ltd Waveform shaping circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8140921B2 (en) * 2004-06-22 2012-03-20 Mitsubishi Electric Corporation System for elevator electronic safety device

Also Published As

Publication number Publication date
JPS592050B2 (en) 1984-01-17

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