JPS57105053A - Integrated circuit which has incorporated testing circuit for fault detecting circuit - Google Patents

Integrated circuit which has incorporated testing circuit for fault detecting circuit

Info

Publication number
JPS57105053A
JPS57105053A JP55181477A JP18147780A JPS57105053A JP S57105053 A JPS57105053 A JP S57105053A JP 55181477 A JP55181477 A JP 55181477A JP 18147780 A JP18147780 A JP 18147780A JP S57105053 A JPS57105053 A JP S57105053A
Authority
JP
Japan
Prior art keywords
circuit
testing
circuits
fault
detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55181477A
Other languages
Japanese (ja)
Other versions
JPS6239786B2 (en
Inventor
Shunji Matsuno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55181477A priority Critical patent/JPS57105053A/en
Publication of JPS57105053A publication Critical patent/JPS57105053A/en
Publication of JPS6239786B2 publication Critical patent/JPS6239786B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits

Abstract

PURPOSE:To output a lot of test signals by a few input signals, and to raise a testing efficiency, by testing a fault detecting circuit for detecting a fault of a function circuit, by use of a testing circuit constituted of a sequence circuit, and integrating its testing circuit together with the function circuit and the fault detecting circuit. CONSTITUTION:A fault detecting circuit for detecting a fault of an operating circuit 1 is constituted of a parity forecasting circuit 2, parity checking circuits 3, 4, coincidence checking circuits 5, 6, and an OR circuit 7, and a testing circuit for testing the circuits 3-6 is constituted of a 3 bit counter 8 and a decoder 9. By these circuits 3, 4, an actual parity signal is generated from the respective operation results Z0-Z3 and Z4-Z7, coincidence of this generated parity signal and a forecasting parity signal forecast by the circuit 2 is checked and a fault of the circuit 1 is detected. In this way, a test pulse from the decoder 9 is provided to the circuits 3-6, respectively, a lot of test signals are outputted by a few input signals, and a test of the circuits 3-6 is executed efficiently.
JP55181477A 1980-12-22 1980-12-22 Integrated circuit which has incorporated testing circuit for fault detecting circuit Granted JPS57105053A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55181477A JPS57105053A (en) 1980-12-22 1980-12-22 Integrated circuit which has incorporated testing circuit for fault detecting circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55181477A JPS57105053A (en) 1980-12-22 1980-12-22 Integrated circuit which has incorporated testing circuit for fault detecting circuit

Publications (2)

Publication Number Publication Date
JPS57105053A true JPS57105053A (en) 1982-06-30
JPS6239786B2 JPS6239786B2 (en) 1987-08-25

Family

ID=16101434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55181477A Granted JPS57105053A (en) 1980-12-22 1980-12-22 Integrated circuit which has incorporated testing circuit for fault detecting circuit

Country Status (1)

Country Link
JP (1) JPS57105053A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182222A (en) * 1984-02-06 1985-09-17 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Parity check circuit
JPS646776A (en) * 1987-06-29 1989-01-11 Nippon Telegraph & Telephone Method of testing semiconductor memory

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0429654Y2 (en) * 1985-11-30 1992-07-17

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918403A (en) * 1972-06-12 1974-02-18
JPS49123549A (en) * 1973-03-30 1974-11-26
JPS5520555A (en) * 1978-08-01 1980-02-14 Nippon Telegr & Teleph Corp <Ntt> Integrated circuit for information process system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4918403A (en) * 1972-06-12 1974-02-18
JPS49123549A (en) * 1973-03-30 1974-11-26
JPS5520555A (en) * 1978-08-01 1980-02-14 Nippon Telegr & Teleph Corp <Ntt> Integrated circuit for information process system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182222A (en) * 1984-02-06 1985-09-17 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン Parity check circuit
JPS646776A (en) * 1987-06-29 1989-01-11 Nippon Telegraph & Telephone Method of testing semiconductor memory

Also Published As

Publication number Publication date
JPS6239786B2 (en) 1987-08-25

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