JPS56101254A - Spare change-over system - Google Patents

Spare change-over system

Info

Publication number
JPS56101254A
JPS56101254A JP384080A JP384080A JPS56101254A JP S56101254 A JPS56101254 A JP S56101254A JP 384080 A JP384080 A JP 384080A JP 384080 A JP384080 A JP 384080A JP S56101254 A JPS56101254 A JP S56101254A
Authority
JP
Japan
Prior art keywords
register
clock signal
terminal
fed
logical address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP384080A
Other languages
Japanese (ja)
Other versions
JPS6051140B2 (en
Inventor
Hiroshi Egawa
Noboru Onishi
Makoto Terajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP55003840A priority Critical patent/JPS6051140B2/en
Publication of JPS56101254A publication Critical patent/JPS56101254A/en
Publication of JPS6051140B2 publication Critical patent/JPS6051140B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To reduce the probability of production of failure, by making erasable the content of the logical address storage register of each constituting element for redundant digital system selectively. CONSTITUTION:The input data terminal 3 of logical address storage register 20-q (q=1, 2, 3, ...n) consisting of shift registers 10 is connected to the logical address data bus 4. The clock input terminal of the register 20-q is connected to the clock signal bus 5 via the AND gate circuit Cq (q=1, 2, 3, ...n). In the register 20-q, ''1'' is fed to the input terminal 3, clock signal is fed to the clock signal terminal 6 to make the register 10-1 as ''1'', and ''0'' is fed to the input terminal 3 to make the i-th register as ''1'' through the application of i-1 clocks to the clock signal terminal of the register for the rewrite. Thus, the parity bit is made to ''0'' to separate failed bit, the failure generation section is limited, and the probability of failure production can be reduced.
JP55003840A 1980-01-17 1980-01-17 Preliminary switching method Expired JPS6051140B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55003840A JPS6051140B2 (en) 1980-01-17 1980-01-17 Preliminary switching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55003840A JPS6051140B2 (en) 1980-01-17 1980-01-17 Preliminary switching method

Publications (2)

Publication Number Publication Date
JPS56101254A true JPS56101254A (en) 1981-08-13
JPS6051140B2 JPS6051140B2 (en) 1985-11-12

Family

ID=11568374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55003840A Expired JPS6051140B2 (en) 1980-01-17 1980-01-17 Preliminary switching method

Country Status (1)

Country Link
JP (1) JPS6051140B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01237844A (en) * 1988-03-18 1989-09-22 Fujitsu Ltd System for diagnostic data processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01237844A (en) * 1988-03-18 1989-09-22 Fujitsu Ltd System for diagnostic data processing system

Also Published As

Publication number Publication date
JPS6051140B2 (en) 1985-11-12

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