JPS5593345A - Error generator for digital simulation - Google Patents

Error generator for digital simulation

Info

Publication number
JPS5593345A
JPS5593345A JP42879A JP42879A JPS5593345A JP S5593345 A JPS5593345 A JP S5593345A JP 42879 A JP42879 A JP 42879A JP 42879 A JP42879 A JP 42879A JP S5593345 A JPS5593345 A JP S5593345A
Authority
JP
Japan
Prior art keywords
error
circuit
register
content
error production
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP42879A
Other languages
Japanese (ja)
Inventor
Masamitsu Norikoshi
Yoshikazu Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KDDI Corp
Original Assignee
Kokusai Denshin Denwa KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kokusai Denshin Denwa KK filed Critical Kokusai Denshin Denwa KK
Priority to JP42879A priority Critical patent/JPS5593345A/en
Publication of JPS5593345A publication Critical patent/JPS5593345A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/24—Testing correct operation
    • H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • H04L1/244—Testing correct operation by comparing a transmitted test signal with a locally generated replica test sequence generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To easily generate the error patterns of various types, by storing the error production intervals with coding in the simulator of digital transmission line and inverting the input digital signal with the output of this memory. CONSTITUTION:The one word of the error production interval information is transferred to the register 6-1 of the decoder 6 from the memroy circuit 8, the content of the register 6-1 is checked with the clock 14, ''1'' is outputted to the error production circuit if the value is 0 and the memory circuit is advanced by one address. If the content of the register 6-1 is not 0, the decoding section 6 outputs ''0'' to the error production circuit 7 and the content of the register 6-1 is subtracted. The readout signal from the memory circuit 4 in which the information from the transmitter 1 produces the error at the error production circuit 7 and transmits it to the receiver 10.
JP42879A 1979-01-09 1979-01-09 Error generator for digital simulation Pending JPS5593345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP42879A JPS5593345A (en) 1979-01-09 1979-01-09 Error generator for digital simulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP42879A JPS5593345A (en) 1979-01-09 1979-01-09 Error generator for digital simulation

Publications (1)

Publication Number Publication Date
JPS5593345A true JPS5593345A (en) 1980-07-15

Family

ID=11473532

Family Applications (1)

Application Number Title Priority Date Filing Date
JP42879A Pending JPS5593345A (en) 1979-01-09 1979-01-09 Error generator for digital simulation

Country Status (1)

Country Link
JP (1) JPS5593345A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2699303A1 (en) * 1992-12-16 1994-06-17 Houdoin Thierry Method of generating cell errors and device for implementing the method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2699303A1 (en) * 1992-12-16 1994-06-17 Houdoin Thierry Method of generating cell errors and device for implementing the method
EP0603055A1 (en) * 1992-12-16 1994-06-22 France Telecom Method and system for generating cell errors in an ATM network

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