JPS5591078A - Binary signal generator circuit - Google Patents
Binary signal generator circuitInfo
- Publication number
- JPS5591078A JPS5591078A JP16176178A JP16176178A JPS5591078A JP S5591078 A JPS5591078 A JP S5591078A JP 16176178 A JP16176178 A JP 16176178A JP 16176178 A JP16176178 A JP 16176178A JP S5591078 A JPS5591078 A JP S5591078A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- capacitor
- circuit
- reference signal
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Image Input (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
PURPOSE: To secure the correct binary decision even in case the input signal has fluctuation by having a comparison between the reading signal given from the screen paper and the output of the reference signal production circuit and then varying the value of the reference signal according to whether the level difference between the input signal and the reference signal is larger or smaller than the set value.
CONSTITUTION: Input signal I1 applied to input terminal T1 of comparator circuit 3 from the detector is then applied to reference signal production circuit 4, and at the same time reference signal S4 delivered from circuit 4 is applied to the other input terminal T2 of circuit 3. Thus the binary decision is given to the input signal. And in case the level difference between signal I1 and signal S4 is under a centain value, the voltage rectified through diodes D1 and D2 is charged to capacitor C1 via resistances R1WR3 and furthermore to capacitor C2 featuring the smaller capacity than capacitor C1. Then reference voltage S4 is generaged by the dischange of capacitor C2. While in case the level difference is over a certain value, signal I1 is set under almost the short-circuit state to give charging to capacitor C2. And signal S4 is generated via the discharge of capacitors C1 and C2, thus ensuring the correct binary decision.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53161761A JPS589470B2 (en) | 1978-12-28 | 1978-12-28 | Binary signal generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53161761A JPS589470B2 (en) | 1978-12-28 | 1978-12-28 | Binary signal generation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5591078A true JPS5591078A (en) | 1980-07-10 |
JPS589470B2 JPS589470B2 (en) | 1983-02-21 |
Family
ID=15741383
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53161761A Expired JPS589470B2 (en) | 1978-12-28 | 1978-12-28 | Binary signal generation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS589470B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01276878A (en) * | 1988-04-27 | 1989-11-07 | Ricoh Elemex Corp | Picture reader |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01134176U (en) * | 1988-03-07 | 1989-09-13 |
-
1978
- 1978-12-28 JP JP53161761A patent/JPS589470B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01276878A (en) * | 1988-04-27 | 1989-11-07 | Ricoh Elemex Corp | Picture reader |
Also Published As
Publication number | Publication date |
---|---|
JPS589470B2 (en) | 1983-02-21 |
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