JPS5589982A - Output circuitry - Google Patents

Output circuitry

Info

Publication number
JPS5589982A
JPS5589982A JP15987278A JP15987278A JPS5589982A JP S5589982 A JPS5589982 A JP S5589982A JP 15987278 A JP15987278 A JP 15987278A JP 15987278 A JP15987278 A JP 15987278A JP S5589982 A JPS5589982 A JP S5589982A
Authority
JP
Japan
Prior art keywords
level
circuit
output
variation
delay time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15987278A
Other languages
Japanese (ja)
Inventor
Takeshi Saito
Tsuneo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15987278A priority Critical patent/JPS5589982A/en
Publication of JPS5589982A publication Critical patent/JPS5589982A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To reduce the transmission delay time and to avoid the variation in the output level, by constituting that the output of a plurality of differential amplification stages is fed to the push pull type inverter via FF circuit. CONSTITUTION:The circuit consists of cascade connection of three differential amplification stages 20A-20C to greatly amplify the level difference between the inputs do and do', FF circuit 22 is driven with the output of the third stage differential amplifier 20C, and the output D0 is obtained via the push pull type inverter 24. In the FF circuit 22, positive feedback is fast fed and the transmission delay time can be reduced. Further, since the FF circuit 22 ensure two stable operation only when the level of he input signals E and F is more than required minimum level, even if the level of the signals E and F is in dispersion due to manufacture torelance of Vtho and Vthe more or less, the variation in the output level can be avoided.
JP15987278A 1978-12-27 1978-12-27 Output circuitry Pending JPS5589982A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15987278A JPS5589982A (en) 1978-12-27 1978-12-27 Output circuitry

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15987278A JPS5589982A (en) 1978-12-27 1978-12-27 Output circuitry

Publications (1)

Publication Number Publication Date
JPS5589982A true JPS5589982A (en) 1980-07-08

Family

ID=15703040

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15987278A Pending JPS5589982A (en) 1978-12-27 1978-12-27 Output circuitry

Country Status (1)

Country Link
JP (1) JPS5589982A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613389A (en) * 1984-06-15 1986-01-09 Hitachi Ltd Memory device
JPH06302192A (en) * 1990-12-12 1994-10-28 Samsung Electron Co Ltd Differential sense amplifier circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS613389A (en) * 1984-06-15 1986-01-09 Hitachi Ltd Memory device
JPH06302192A (en) * 1990-12-12 1994-10-28 Samsung Electron Co Ltd Differential sense amplifier circuit

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