JPS5588477A - Recorder/reproducer for still picture video signal - Google Patents

Recorder/reproducer for still picture video signal

Info

Publication number
JPS5588477A
JPS5588477A JP16353978A JP16353978A JPS5588477A JP S5588477 A JPS5588477 A JP S5588477A JP 16353978 A JP16353978 A JP 16353978A JP 16353978 A JP16353978 A JP 16353978A JP S5588477 A JPS5588477 A JP S5588477A
Authority
JP
Japan
Prior art keywords
signal
memories
reproducer
recorder
vertical synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16353978A
Other languages
Japanese (ja)
Inventor
Toshio Matsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP16353978A priority Critical patent/JPS5588477A/en
Publication of JPS5588477A publication Critical patent/JPS5588477A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Signal Processing For Recording (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

PURPOSE: To simplify the constitution for the recorder/reproducer by carrying out the writing and reading of the memory via the vertical synchronous signal in case the input analog video sinal is stored in the memory after A/D conversion.
CONSTITUTION: The digital video signals obtained by giving 3-equal divisions to the video signal are written into memories 11A∼11C via writing signal WR. With switch SW1 turned on, vertical synchronous signal PV inverts FF23 through gate 22. The write signal WR is delivered to terminal Q' of FF23, and this output is applied to memories 11A∼11C. The output is delivered through gate 25 via the next vertical synchronous signal to reset FF21. At the same time, the write signal does not exist with FF30 set, and the still picture video signals read out of memories 11A∼ 11C are supplied to the video intermediate frequency amplifier. Then switch SW2 is turned on, and thus FF30 is reset to the original state.
COPYRIGHT: (C)1980,JPO&Japio
JP16353978A 1978-12-25 1978-12-25 Recorder/reproducer for still picture video signal Pending JPS5588477A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16353978A JPS5588477A (en) 1978-12-25 1978-12-25 Recorder/reproducer for still picture video signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16353978A JPS5588477A (en) 1978-12-25 1978-12-25 Recorder/reproducer for still picture video signal

Publications (1)

Publication Number Publication Date
JPS5588477A true JPS5588477A (en) 1980-07-04

Family

ID=15775799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16353978A Pending JPS5588477A (en) 1978-12-25 1978-12-25 Recorder/reproducer for still picture video signal

Country Status (1)

Country Link
JP (1) JPS5588477A (en)

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