JPS5588166A - Display controller for number of time of repeat input of input data - Google Patents

Display controller for number of time of repeat input of input data

Info

Publication number
JPS5588166A
JPS5588166A JP16325278A JP16325278A JPS5588166A JP S5588166 A JPS5588166 A JP S5588166A JP 16325278 A JP16325278 A JP 16325278A JP 16325278 A JP16325278 A JP 16325278A JP S5588166 A JPS5588166 A JP S5588166A
Authority
JP
Japan
Prior art keywords
input
data
repeat input
repeat
code data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16325278A
Other languages
Japanese (ja)
Inventor
Goji Suzue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba TEC Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Priority to JP16325278A priority Critical patent/JPS5588166A/en
Publication of JPS5588166A publication Critical patent/JPS5588166A/en
Pending legal-status Critical Current

Links

Landscapes

  • Cash Registers Or Receiving Machines (AREA)
  • Digital Computer Display Output (AREA)

Abstract

PURPOSE: To simplify a manufacture process and service process by making a program to be used and mask ROM into one sequence by reading code data for displaying the number of times of repeat input from a buffer memory and then by inputting the code data to both a segment and lamp driver.
CONSTITUTION: Selection switch 6 is provided which is used to determine whether the number of times of repeat input of input data is displayed on segment display unit 4 or lamp display unit 5, and when data of the number of times of repeat input is inputted, I/O port 7 retrieves the state of switch 6. On the basis of this selection result and the data of the number of times of repeat input, CPU1 reads the fixed code data for displaying the number of times of repeat input from ROM2 and stored the data in RAM3. At the timing when a display digit for the number of times of repeat input of display unit 4 is driven from RAM3, the code data for displaying the number of times of repeat input is read out and then inputted to both digit driver 9 and segment driver 10 by way of display interface 8.
COPYRIGHT: (C)1980,JPO&Japio
JP16325278A 1978-12-27 1978-12-27 Display controller for number of time of repeat input of input data Pending JPS5588166A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16325278A JPS5588166A (en) 1978-12-27 1978-12-27 Display controller for number of time of repeat input of input data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16325278A JPS5588166A (en) 1978-12-27 1978-12-27 Display controller for number of time of repeat input of input data

Publications (1)

Publication Number Publication Date
JPS5588166A true JPS5588166A (en) 1980-07-03

Family

ID=15770245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16325278A Pending JPS5588166A (en) 1978-12-27 1978-12-27 Display controller for number of time of repeat input of input data

Country Status (1)

Country Link
JP (1) JPS5588166A (en)

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