JPS5585257A - Phase difference measuring circuit - Google Patents

Phase difference measuring circuit

Info

Publication number
JPS5585257A
JPS5585257A JP15745778A JP15745778A JPS5585257A JP S5585257 A JPS5585257 A JP S5585257A JP 15745778 A JP15745778 A JP 15745778A JP 15745778 A JP15745778 A JP 15745778A JP S5585257 A JPS5585257 A JP S5585257A
Authority
JP
Japan
Prior art keywords
signal
counter
phase difference
frequency
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15745778A
Other languages
Japanese (ja)
Inventor
Takashi Katayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15745778A priority Critical patent/JPS5585257A/en
Publication of JPS5585257A publication Critical patent/JPS5585257A/en
Pending legal-status Critical Current

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  • Measuring Phase Differences (AREA)

Abstract

PURPOSE: To accomplish a highly accurate measurement of phase difference by taking logical product of the signal A and the signal B within a frequency f, and when the signal is positive, counter is counted by the pulse of the frequency nf whose value is substracted from n/2.
CONSTITUTION: Signals A and B are turned to a signal a through "and" with an and circuit 10. The signal B is multiplied by n to a signal b with a frequency mulitiplier 13. "And" of the signal a and b constitutes a clock of a counter 14. The signal A is applied to the counter 9. The number of the clock is counted by the counter 14 when the output c of the counter 9 is positive and memorized in a register 15. A data is transfered to a complementary counter 16 with the rise of the signal b and converted to the complement of 2. The data is provided to an adder 17. With the addition of the data and the binary of n/2, phase difference the signal A and B can be determined.
COPYRIGHT: (C)1980,JPO&Japio
JP15745778A 1978-12-22 1978-12-22 Phase difference measuring circuit Pending JPS5585257A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15745778A JPS5585257A (en) 1978-12-22 1978-12-22 Phase difference measuring circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15745778A JPS5585257A (en) 1978-12-22 1978-12-22 Phase difference measuring circuit

Publications (1)

Publication Number Publication Date
JPS5585257A true JPS5585257A (en) 1980-06-27

Family

ID=15650071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15745778A Pending JPS5585257A (en) 1978-12-22 1978-12-22 Phase difference measuring circuit

Country Status (1)

Country Link
JP (1) JPS5585257A (en)

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