JPS5510526A - Low frequency measuring device - Google Patents

Low frequency measuring device

Info

Publication number
JPS5510526A
JPS5510526A JP8323778A JP8323778A JPS5510526A JP S5510526 A JPS5510526 A JP S5510526A JP 8323778 A JP8323778 A JP 8323778A JP 8323778 A JP8323778 A JP 8323778A JP S5510526 A JPS5510526 A JP S5510526A
Authority
JP
Japan
Prior art keywords
output
input
adder
terminal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8323778A
Other languages
Japanese (ja)
Inventor
Minoru Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iwatsu Electric Co Ltd
Original Assignee
Iwatsu Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iwatsu Electric Co Ltd filed Critical Iwatsu Electric Co Ltd
Priority to JP8323778A priority Critical patent/JPS5510526A/en
Publication of JPS5510526A publication Critical patent/JPS5510526A/en
Pending legal-status Critical Current

Links

Landscapes

  • Measuring Frequencies, Analyzing Spectra (AREA)

Abstract

PURPOSE: To reduce the number of the component parts as well as to increase the response velocity by adding the adder and the edge trigger flip-flop to the arithmetictype low frequency measuring device which measures the cycle to obtain the frequency.
CONSTITUTION: When the input signal is supplied to terminal 1 for measurement of the frequency, one cycle of the input signal is detected by FF2. Output Q of FF2 and the clock signal applied to terminal 3 are applied to counter 5 to form the binary coded output. This output is applied to input A1W8 of adder 6 possessing input A1W8 of the augend, input B1W8 of the addend, sum output S1W8 and output terminal C0 of the carry signal each. At the same time, the output of output Q1W8 of edge trigger FF7 and the output of sum output S1W8 of adder 6 are applied to input B1W8 and data input D1W8 of FF7 respectively. The input signals are counted by counter 13 until the carry signal is applied from adder 6 to be displayed on display unit 14.
COPYRIGHT: (C)1980,JPO&Japio
JP8323778A 1978-07-08 1978-07-08 Low frequency measuring device Pending JPS5510526A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8323778A JPS5510526A (en) 1978-07-08 1978-07-08 Low frequency measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8323778A JPS5510526A (en) 1978-07-08 1978-07-08 Low frequency measuring device

Publications (1)

Publication Number Publication Date
JPS5510526A true JPS5510526A (en) 1980-01-25

Family

ID=13796708

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8323778A Pending JPS5510526A (en) 1978-07-08 1978-07-08 Low frequency measuring device

Country Status (1)

Country Link
JP (1) JPS5510526A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52139477A (en) * 1976-05-18 1977-11-21 Toshiba Corp Frequency measuring system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52139477A (en) * 1976-05-18 1977-11-21 Toshiba Corp Frequency measuring system

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