JPS5578596A - Method of fabricating multilayer printed circuit board - Google Patents

Method of fabricating multilayer printed circuit board

Info

Publication number
JPS5578596A
JPS5578596A JP15096878A JP15096878A JPS5578596A JP S5578596 A JPS5578596 A JP S5578596A JP 15096878 A JP15096878 A JP 15096878A JP 15096878 A JP15096878 A JP 15096878A JP S5578596 A JPS5578596 A JP S5578596A
Authority
JP
Japan
Prior art keywords
circuit board
printed circuit
multilayer printed
fabricating multilayer
fabricating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15096878A
Other languages
Japanese (ja)
Inventor
Keiji Kurosawa
Mitsuo Yamashita
Takeo Tokiwa
Yuukichi Takeda
Kiyoshi Takagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15096878A priority Critical patent/JPS5578596A/en
Publication of JPS5578596A publication Critical patent/JPS5578596A/en
Pending legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP15096878A 1978-12-08 1978-12-08 Method of fabricating multilayer printed circuit board Pending JPS5578596A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15096878A JPS5578596A (en) 1978-12-08 1978-12-08 Method of fabricating multilayer printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15096878A JPS5578596A (en) 1978-12-08 1978-12-08 Method of fabricating multilayer printed circuit board

Publications (1)

Publication Number Publication Date
JPS5578596A true JPS5578596A (en) 1980-06-13

Family

ID=15508365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15096878A Pending JPS5578596A (en) 1978-12-08 1978-12-08 Method of fabricating multilayer printed circuit board

Country Status (1)

Country Link
JP (1) JPS5578596A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125697A (en) * 1982-12-27 1984-07-20 富士通株式会社 Method of surface treating conductor pattern of multilayer printed board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125697A (en) * 1982-12-27 1984-07-20 富士通株式会社 Method of surface treating conductor pattern of multilayer printed board
JPH0222553B2 (en) * 1982-12-27 1990-05-18 Fujitsu Ltd

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