JPS5574239A - Analog/digital converter with check function in fail safe - Google Patents

Analog/digital converter with check function in fail safe

Info

Publication number
JPS5574239A
JPS5574239A JP14939278A JP14939278A JPS5574239A JP S5574239 A JPS5574239 A JP S5574239A JP 14939278 A JP14939278 A JP 14939278A JP 14939278 A JP14939278 A JP 14939278A JP S5574239 A JPS5574239 A JP S5574239A
Authority
JP
Japan
Prior art keywords
signal
ain
logical sum
analog
comparators
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14939278A
Other languages
Japanese (ja)
Inventor
Naoyuki Konishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14939278A priority Critical patent/JPS5574239A/en
Publication of JPS5574239A publication Critical patent/JPS5574239A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To enable fail safe of check function, by comparing analog input signal and analog signal at the signal comparison and discrimination circuit and checking dynamically whether the comparison result is outputed or not according to the time sequence.
CONSTITUTION: The analog input signal AIN is converted into digital output signal DOUT at the A/D conversion circuit 1. The addition circuits 12 and 13 add the signal AIN and the voltages ΔVH, ΔVL of the correction power supplies 10, 11 and input them to the input terminal B of the comparators 8, 9. The comparator 8 compares the magnitude AIN+ΔVH with AD and the comparator 9 does that of AIN+ ΔVL and AD. If the exclusive logical sum of the comparators 8 and 9 is H and the timing logical sum of the output and the pulse "1" of the frequency dividing 14, it is judged when the exclusive logical sum of the comparators 8 and 9 is L and the timing logical sum of the pulses "0" and "2" of the circuit 5 and the inverting output is H.
COPYRIGHT: (C)1980,JPO&Japio
JP14939278A 1978-11-30 1978-11-30 Analog/digital converter with check function in fail safe Pending JPS5574239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14939278A JPS5574239A (en) 1978-11-30 1978-11-30 Analog/digital converter with check function in fail safe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14939278A JPS5574239A (en) 1978-11-30 1978-11-30 Analog/digital converter with check function in fail safe

Publications (1)

Publication Number Publication Date
JPS5574239A true JPS5574239A (en) 1980-06-04

Family

ID=15474113

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14939278A Pending JPS5574239A (en) 1978-11-30 1978-11-30 Analog/digital converter with check function in fail safe

Country Status (1)

Country Link
JP (1) JPS5574239A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03268611A (en) * 1990-03-19 1991-11-29 Nec Corp Analog/digital converter monitor circuit
JP2011176438A (en) * 2010-02-23 2011-09-08 Toshiba Mitsubishi-Electric Industrial System Corp A/d conversion device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03268611A (en) * 1990-03-19 1991-11-29 Nec Corp Analog/digital converter monitor circuit
JP2011176438A (en) * 2010-02-23 2011-09-08 Toshiba Mitsubishi-Electric Industrial System Corp A/d conversion device

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