JPS5573982A - Address conversion unit of data transfer unit - Google Patents
Address conversion unit of data transfer unitInfo
- Publication number
- JPS5573982A JPS5573982A JP14495078A JP14495078A JPS5573982A JP S5573982 A JPS5573982 A JP S5573982A JP 14495078 A JP14495078 A JP 14495078A JP 14495078 A JP14495078 A JP 14495078A JP S5573982 A JPS5573982 A JP S5573982A
- Authority
- JP
- Japan
- Prior art keywords
- address
- register
- input
- circuit
- comparison
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To obtain agreement of an address conversion pair with a simple circuit by providing two sets of address conversion pair storage means in the information- system address conversion unit of the virtual memory system and controlling the use of these storage means on a basis of address comparison.
CONSTITUTION: Lower bits (PD part) indicating a word position and upper bits (PN part) indicating a page number for storage into logical address register 1 are sent to switching circuit 12 and input A of a comparator circuit respectively. Input A is compared with input B of the page number set in page number boundary register 6. The comparison result is sent to main control circuit 13, and the output of page register 2 and the output of page register 3 are supplied to input B in case of A>B and A≤B respectively and are compared with input A (comparison operation II). Circuit 13 sends a switching signal to circuit 12 according to comparison between A and B when the result of comparison operation II is obtained, and a conversion actual address is stored in actual address register 8 by an address conversion pair in the unit itself for comparison result A=B, and the address on a memory unit of a page indication word corresponding to the logical address to be converted is stored in actual address register 8 for comparison result A≠B.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14495078A JPS5573982A (en) | 1978-11-25 | 1978-11-25 | Address conversion unit of data transfer unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14495078A JPS5573982A (en) | 1978-11-25 | 1978-11-25 | Address conversion unit of data transfer unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5573982A true JPS5573982A (en) | 1980-06-04 |
Family
ID=15373951
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14495078A Pending JPS5573982A (en) | 1978-11-25 | 1978-11-25 | Address conversion unit of data transfer unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5573982A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7148503B2 (en) * | 2000-10-05 | 2006-12-12 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device, function setting method thereof, and evaluation method thereof |
-
1978
- 1978-11-25 JP JP14495078A patent/JPS5573982A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7148503B2 (en) * | 2000-10-05 | 2006-12-12 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device, function setting method thereof, and evaluation method thereof |
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