JPS5564687A - Writing method for memory - Google Patents

Writing method for memory

Info

Publication number
JPS5564687A
JPS5564687A JP13748878A JP13748878A JPS5564687A JP S5564687 A JPS5564687 A JP S5564687A JP 13748878 A JP13748878 A JP 13748878A JP 13748878 A JP13748878 A JP 13748878A JP S5564687 A JPS5564687 A JP S5564687A
Authority
JP
Japan
Prior art keywords
memory element
memory
voltage
current
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13748878A
Other languages
Japanese (ja)
Other versions
JPS6151428B2 (en
Inventor
Tsutomu Matsuura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13748878A priority Critical patent/JPS5564687A/en
Publication of JPS5564687A publication Critical patent/JPS5564687A/en
Publication of JPS6151428B2 publication Critical patent/JPS6151428B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links

Landscapes

  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To improve the degree of integration of P-ROM by using different current channels in a destructive memory for selection of a memory element and memory- element destruction. CONSTITUTION:To write information to memory element S11 at an intersection between wirings Y1 and X1, a positive voltage is applied firstly to base B1 of transistor Tr1 to make the transistor conductive and a current is flowed from wiring Y1 to select the position of memory element S11. Next, when a voltage across S extracted from semiconductor substrate 1 with time delay is changed from the earth voltage into a negative voltage, PNPTr11 connected to the base of memory element S11 operates to flow a large current, needed to destroy element S11, from the base of the memory element into an insulation region, thereby destroying the memory element. Consequently, the large current flows to substrate 1 through PNPTr and to buried layer 2, only a current for selecting a memory element flows to reduce a voltage developed at layer 2, so that many elements can be constituted in the same insulation region.
JP13748878A 1978-11-08 1978-11-08 Writing method for memory Granted JPS5564687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13748878A JPS5564687A (en) 1978-11-08 1978-11-08 Writing method for memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13748878A JPS5564687A (en) 1978-11-08 1978-11-08 Writing method for memory

Publications (2)

Publication Number Publication Date
JPS5564687A true JPS5564687A (en) 1980-05-15
JPS6151428B2 JPS6151428B2 (en) 1986-11-08

Family

ID=15199806

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13748878A Granted JPS5564687A (en) 1978-11-08 1978-11-08 Writing method for memory

Country Status (1)

Country Link
JP (1) JPS5564687A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4804041A (en) * 1985-05-15 1989-02-14 Showa Aluminum Corporation Heat-exchanger of plate fin type

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52140A (en) * 1975-06-21 1977-01-05 Nec Corp Programmable monolithic integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52140A (en) * 1975-06-21 1977-01-05 Nec Corp Programmable monolithic integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4804041A (en) * 1985-05-15 1989-02-14 Showa Aluminum Corporation Heat-exchanger of plate fin type

Also Published As

Publication number Publication date
JPS6151428B2 (en) 1986-11-08

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