JPS5561187A - Rejection circuit for cross color - Google Patents

Rejection circuit for cross color

Info

Publication number
JPS5561187A
JPS5561187A JP13402078A JP13402078A JPS5561187A JP S5561187 A JPS5561187 A JP S5561187A JP 13402078 A JP13402078 A JP 13402078A JP 13402078 A JP13402078 A JP 13402078A JP S5561187 A JPS5561187 A JP S5561187A
Authority
JP
Japan
Prior art keywords
cross color
signal
original signal
circuit
original
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13402078A
Other languages
Japanese (ja)
Inventor
Toshiaki Nakanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP13402078A priority Critical patent/JPS5561187A/en
Publication of JPS5561187A publication Critical patent/JPS5561187A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable to reject the cross color, by forming the original signal delayed by a given value to the original signal and operating the both original signals.
CONSTITUTION: The original signal(delay signal) including the cross color component in which it is in opposite phase to the original signal and in-phase to the cross color component included in the original signal, is formed and the cross color is rejected by the operational precessing of the both signals. That is, the chroma signal Sc1 picked up and separated at BPF4 is fed to the first processing circuit 10A and the second processing circuit 10B. The processing circuits 10A and 10B are constituted with the delay circuits 12, 14 having specified delay times τ1 and τ2 and the subtractors 13 and 15. Thus, the cross color produced in two directions can be rejected by using the vertical corelativity of chroma signal obtained from two horizontal scanning lines adjacent each other in the circuit 10A and by using the vertical corelativity of chroma signal obtained from the horizontal scanning lines in every other lines in the circuit 10B.
COPYRIGHT: (C)1980,JPO&Japio
JP13402078A 1978-10-31 1978-10-31 Rejection circuit for cross color Pending JPS5561187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13402078A JPS5561187A (en) 1978-10-31 1978-10-31 Rejection circuit for cross color

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13402078A JPS5561187A (en) 1978-10-31 1978-10-31 Rejection circuit for cross color

Publications (1)

Publication Number Publication Date
JPS5561187A true JPS5561187A (en) 1980-05-08

Family

ID=15118491

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13402078A Pending JPS5561187A (en) 1978-10-31 1978-10-31 Rejection circuit for cross color

Country Status (1)

Country Link
JP (1) JPS5561187A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080389A (en) * 1983-10-07 1985-05-08 Sony Corp Y/c separation circuit
JPH01223892A (en) * 1988-03-03 1989-09-06 Fujitsu General Ltd Y/c separation circuit for video image processing section

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6080389A (en) * 1983-10-07 1985-05-08 Sony Corp Y/c separation circuit
JPH01223892A (en) * 1988-03-03 1989-09-06 Fujitsu General Ltd Y/c separation circuit for video image processing section
JPH0632452B2 (en) * 1988-03-03 1994-04-27 株式会社富士通ゼネラル Y / C separation circuit of video processing unit

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