JPS5560361A - Automatic switching circuit between bit synchronism and bit asynchronism - Google Patents

Automatic switching circuit between bit synchronism and bit asynchronism

Info

Publication number
JPS5560361A
JPS5560361A JP13266678A JP13266678A JPS5560361A JP S5560361 A JPS5560361 A JP S5560361A JP 13266678 A JP13266678 A JP 13266678A JP 13266678 A JP13266678 A JP 13266678A JP S5560361 A JPS5560361 A JP S5560361A
Authority
JP
Japan
Prior art keywords
bit
output
signal
asynchronism
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13266678A
Other languages
Japanese (ja)
Other versions
JPS6131B2 (en
Inventor
Takao Oe
Toshiharu Ogasawara
Shigeru Sakurai
Yoshiyuki Yugawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13266678A priority Critical patent/JPS5560361A/en
Publication of JPS5560361A publication Critical patent/JPS5560361A/en
Publication of JPS6131B2 publication Critical patent/JPS6131B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To make it possible to alternate between bit synchronism and bit asynchronism automatically by allowing a communication controller to use the output of a RT signal generating circuit when no RT signal arrives or the RT signal when arriving. CONSTITUTION:In a bit synchronism mode, a RT signal arrives and the output of RT signal detection circuit 6 has logic ''1''. As a result, the output of AND gate 5 has logic ''0'', inhibiting RT signal generating circuit 2 from generating its output. The RT signal, on the other hand, is transmitted to an external circuit by way of receiver 1, AND gate 7 and OR gate 4. In a bit asynchronism mode, no RT signal arrives and the output of circuit 6 has logic ''0''. Then, the output of AND gate 5 has logic ''1'' and the output of circuit 2 is sent to the external circuit by way of gates 5 and 4.
JP13266678A 1978-10-30 1978-10-30 Automatic switching circuit between bit synchronism and bit asynchronism Granted JPS5560361A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13266678A JPS5560361A (en) 1978-10-30 1978-10-30 Automatic switching circuit between bit synchronism and bit asynchronism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13266678A JPS5560361A (en) 1978-10-30 1978-10-30 Automatic switching circuit between bit synchronism and bit asynchronism

Publications (2)

Publication Number Publication Date
JPS5560361A true JPS5560361A (en) 1980-05-07
JPS6131B2 JPS6131B2 (en) 1986-01-06

Family

ID=15086646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13266678A Granted JPS5560361A (en) 1978-10-30 1978-10-30 Automatic switching circuit between bit synchronism and bit asynchronism

Country Status (1)

Country Link
JP (1) JPS5560361A (en)

Also Published As

Publication number Publication date
JPS6131B2 (en) 1986-01-06

Similar Documents

Publication Publication Date Title
JPS5560361A (en) Automatic switching circuit between bit synchronism and bit asynchronism
JPS5784645A (en) By-pass circuit
JPS566550A (en) Data transmission system
JPS5671358A (en) Control system for button telephone
JPS57183154A (en) Multispeed transmission system
JPS57174962A (en) Modem for two-wire type half duplex communication
JPS55130244A (en) Radio communication unit
JPS5333011A (en) Information processing console unit
JPS5221760A (en) Input judgement circuit
JPS52125213A (en) Absence transfer system
JPS53132969A (en) Selective gate circuit
JPS6468052A (en) Modem telephone set
JPS57106261A (en) Data transmission device
JPS5452402A (en) Data transmitter
JPS54159101A (en) Communication control unit
JPS5374309A (en) Adaptive echo eraser
JPS5516570A (en) Subscribersigma return circuit
JPS6446353A (en) Service signal receiver in digital radio line
JPS55127750A (en) Transmission and receiving control circuit
JPS56110130A (en) Priority concurrent circuit
JPS56138347A (en) Elastic memory controlling circuit
JPS54111207A (en) Data transmission system
JPS5443431A (en) Communication control unit
JPS55114057A (en) Data communication circuit connection switching unit
JPS522208A (en) Means for genratig signal to switch sending and receiving