JPS5559547A - Information process system - Google Patents

Information process system

Info

Publication number
JPS5559547A
JPS5559547A JP13235278A JP13235278A JPS5559547A JP S5559547 A JPS5559547 A JP S5559547A JP 13235278 A JP13235278 A JP 13235278A JP 13235278 A JP13235278 A JP 13235278A JP S5559547 A JPS5559547 A JP S5559547A
Authority
JP
Japan
Prior art keywords
ram3
data
unit
rom2
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13235278A
Other languages
Japanese (ja)
Inventor
Ryozo Maeno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13235278A priority Critical patent/JPS5559547A/en
Publication of JPS5559547A publication Critical patent/JPS5559547A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize the start of the FW load for the RAM without increasing the amount of hardware by giving the detection and process via farmware FW within ROM to the input/output order given from the CPU in the form of a kind of the FW load order.
CONSTITUTION: It is supposed that control unit 1 is controlled by the FW stored within ROM2. Thus the specified command data is detected by the FW within ROM2. Unit 1 reads FW data 5 from other information processor 4 to sotre it in RAM3 and then branches off from the FW within ROM2 to the FW within RAM3. After this, the data is controlled continuously at unit 1 by the FW within RAM3. With use of such input/output order, the FW data is loaded within RAM3. And subsequetly the initial setting or the normal operation becomes possible for unit 1. As a result, the hardware-type trigger can be omitted for the FW load starting of the RAM.
COPYRIGHT: (C)1980,JPO&Japio
JP13235278A 1978-10-27 1978-10-27 Information process system Pending JPS5559547A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13235278A JPS5559547A (en) 1978-10-27 1978-10-27 Information process system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13235278A JPS5559547A (en) 1978-10-27 1978-10-27 Information process system

Publications (1)

Publication Number Publication Date
JPS5559547A true JPS5559547A (en) 1980-05-06

Family

ID=15079342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13235278A Pending JPS5559547A (en) 1978-10-27 1978-10-27 Information process system

Country Status (1)

Country Link
JP (1) JPS5559547A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8421285B2 (en) 2009-02-27 2013-04-16 Hitachi, Ltd Permanent magnet type electric power generator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8421285B2 (en) 2009-02-27 2013-04-16 Hitachi, Ltd Permanent magnet type electric power generator

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