JPS5555623A - A/d converter - Google Patents

A/d converter

Info

Publication number
JPS5555623A
JPS5555623A JP12894878A JP12894878A JPS5555623A JP S5555623 A JPS5555623 A JP S5555623A JP 12894878 A JP12894878 A JP 12894878A JP 12894878 A JP12894878 A JP 12894878A JP S5555623 A JPS5555623 A JP S5555623A
Authority
JP
Japan
Prior art keywords
capacitors
capacitor
constitution
turning
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12894878A
Other languages
Japanese (ja)
Inventor
Kanji Hirabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP12894878A priority Critical patent/JPS5555623A/en
Publication of JPS5555623A publication Critical patent/JPS5555623A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE: To perform A/D conversion of high accuracy, by sufficiently small the capacitance ratio of two capacitors constituting the A/D converter.
CONSTITUTION: Two MOS capacitors C1 and C2 in different capacitance are provided with one end in common connection, and the capacitor C1 is charged with the input voltage V1 to be converted or reference input voltage VR by turning on the switch S1 or S2 of MOS transistors. Next, the charge of the capacitor C2 is discharged by turning on the switch S4 after redistributing the charges between the capacitors C1 and C2 by turning on the switch S3. Further, the terminal voltage VX of the capacitor C1 is inputted to one terminal of the comparator COM placed on the circuit and threshold voltage VT is inputted to another. With this constitution, the counter CT is driven while the comparator COM in VX≥VT, and the clock driving the switches S1 to S4 is counted as it is or in frequency division. With this constitution, the capacitance ratio α of two capacitors C1 and C2 is sufficiently taken small to increase the conversion accuracy and to make small the converter in size.
COPYRIGHT: (C)1980,JPO&Japio
JP12894878A 1978-10-19 1978-10-19 A/d converter Pending JPS5555623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12894878A JPS5555623A (en) 1978-10-19 1978-10-19 A/d converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12894878A JPS5555623A (en) 1978-10-19 1978-10-19 A/d converter

Publications (1)

Publication Number Publication Date
JPS5555623A true JPS5555623A (en) 1980-04-23

Family

ID=14997357

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12894878A Pending JPS5555623A (en) 1978-10-19 1978-10-19 A/d converter

Country Status (1)

Country Link
JP (1) JPS5555623A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318725A (en) * 1985-08-13 1988-01-26 ザ・バブコツク・アンド・ウイルコツクス・カンパニ− Low level voltage-pulse converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6318725A (en) * 1985-08-13 1988-01-26 ザ・バブコツク・アンド・ウイルコツクス・カンパニ− Low level voltage-pulse converter

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