JPS5555264A - Current integrater - Google Patents

Current integrater

Info

Publication number
JPS5555264A
JPS5555264A JP12821578A JP12821578A JPS5555264A JP S5555264 A JPS5555264 A JP S5555264A JP 12821578 A JP12821578 A JP 12821578A JP 12821578 A JP12821578 A JP 12821578A JP S5555264 A JPS5555264 A JP S5555264A
Authority
JP
Japan
Prior art keywords
voltage
signals
output
current
input currents
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12821578A
Other languages
Japanese (ja)
Inventor
Ryoji Gamo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12821578A priority Critical patent/JPS5555264A/en
Publication of JPS5555264A publication Critical patent/JPS5555264A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To accurately integrate minute input signals, by removing offset voltage by drawing DC voltage signals that are proportional to input currents, absolute values being equal and the polarity differs at the secondary side of a power transformer.
CONSTITUTION: A rectifying circuit 22 consisting of diodes D1WD4 and current- voltage converting elements Ri1, Ri2, Ci is mounted at the secondary side of a current transformer 21 installed to a feeder, and DC voltage is signals ep, en that are proportioned to AC input currents, the absolute value is similar and the polarity differs and drawn between the output terminals. The signals, ep, en are alternately supplied to an integration circuit 24 by means of a switch 23, the output of a comparator 25 is inverted every time integration output reaches fixed voltage and the switch 23 is changed over in response to inversion output. Thus, frequency fo formed by the inversion output of the comparator 25 proportional to the AC input currents.
COPYRIGHT: (C)1980,JPO&Japio
JP12821578A 1978-10-18 1978-10-18 Current integrater Pending JPS5555264A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12821578A JPS5555264A (en) 1978-10-18 1978-10-18 Current integrater

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12821578A JPS5555264A (en) 1978-10-18 1978-10-18 Current integrater

Publications (1)

Publication Number Publication Date
JPS5555264A true JPS5555264A (en) 1980-04-23

Family

ID=14979332

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12821578A Pending JPS5555264A (en) 1978-10-18 1978-10-18 Current integrater

Country Status (1)

Country Link
JP (1) JPS5555264A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PL422457A1 (en) * 2017-08-07 2019-02-11 APATOR Spółka Akcyjna Feed system, preferably in electric energy meters

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PL422457A1 (en) * 2017-08-07 2019-02-11 APATOR Spółka Akcyjna Feed system, preferably in electric energy meters

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