JPS5548815A - Peak level display circuit - Google Patents
Peak level display circuitInfo
- Publication number
- JPS5548815A JPS5548815A JP12335878A JP12335878A JPS5548815A JP S5548815 A JPS5548815 A JP S5548815A JP 12335878 A JP12335878 A JP 12335878A JP 12335878 A JP12335878 A JP 12335878A JP S5548815 A JPS5548815 A JP S5548815A
- Authority
- JP
- Japan
- Prior art keywords
- peak value
- signal
- circuit
- input signal
- fed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To enable to grasp correctly for the signal in rapid variation of the peak value, by displaying the maximum peak value up to the signal immediately before as well as the peak value of the input signal.
CONSTITUTION: The peak value of audio signal amplified 1 is detected 2 and it is tentatively held at the recovery circuit 3. The maximum peak value of the signal at the circuit 3 is stored in the circuit 4. Further, if the peak value of the input signal is greater than the signal value stored in the memory circuit 2, the circuit 2 keeps the memory state, but if the input signal is smaller, the input signal is fed to the display unit 13 via the switch 8 and the signal in the memory circuit is fed to the display 13 via the switch 9. In this case, the switching time of the switches 8 and 9 is respectively controlled to form different passing amount of signal, resulting in that the input signal is brightly displayed while the maximum peak value is in drak. Thus, even if the peak value is rapidly changed, the peak value can easily be grasped.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12335878A JPS5548815A (en) | 1978-10-03 | 1978-10-03 | Peak level display circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12335878A JPS5548815A (en) | 1978-10-03 | 1978-10-03 | Peak level display circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5548815A true JPS5548815A (en) | 1980-04-08 |
Family
ID=14858596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12335878A Pending JPS5548815A (en) | 1978-10-03 | 1978-10-03 | Peak level display circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5548815A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54115214A (en) * | 1978-02-28 | 1979-09-07 | Pioneer Electronic Corp | Level indicator |
JPS5853431A (en) * | 1981-09-04 | 1983-03-30 | モ−リンズ・マシ−ン・カンパニ− | Automatic slitter scorer |
-
1978
- 1978-10-03 JP JP12335878A patent/JPS5548815A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54115214A (en) * | 1978-02-28 | 1979-09-07 | Pioneer Electronic Corp | Level indicator |
JPS5853431A (en) * | 1981-09-04 | 1983-03-30 | モ−リンズ・マシ−ン・カンパニ− | Automatic slitter scorer |
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