JPS5676864A - Combined device of electronic clocking device and electronic desk computer - Google Patents

Combined device of electronic clocking device and electronic desk computer

Info

Publication number
JPS5676864A
JPS5676864A JP16200080A JP16200080A JPS5676864A JP S5676864 A JPS5676864 A JP S5676864A JP 16200080 A JP16200080 A JP 16200080A JP 16200080 A JP16200080 A JP 16200080A JP S5676864 A JPS5676864 A JP S5676864A
Authority
JP
Japan
Prior art keywords
clocking
signal
changed over
electronic
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16200080A
Other languages
Japanese (ja)
Inventor
Ryoichi Hori
Seiji Kubo
Yataro Yamashita
Kazuichi Ikegami
Minoru Nagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16200080A priority Critical patent/JPS5676864A/en
Publication of JPS5676864A publication Critical patent/JPS5676864A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To display a clocking information on an electronic desk computer, by displaying the clocking information through a decoder with the action state switch changed over to the clocking mode and then performing the calculating function with the switch changed over to the various kinds of calculation modes.
CONSTITUTION: When the action state switch 2 is changed over to the clocking mode, the signal showing the clocking mode is applied to the arithmetic controller 8 and the decoder 11. Receiving the clocking mode signal, the controller 8 informs the arithmetic circuit 10 that the signal supplied from the input means 1 is the clocking signal and at the same time gives a control so that the clocking operation may be carried out with the clocking signal used for the initial value only in the period of the clocking band of the switch signal applied from the generator 4. Then the clocking information is displayed on the display circuit 12 via the decoder 11. While in the case of a computer, the switch 2 is changed over to various types of calculation modes. Thus the input means of an electronic desk computer is used also as the input means of the clocking information.
COPYRIGHT: (C)1981,JPO&Japio
JP16200080A 1980-11-19 1980-11-19 Combined device of electronic clocking device and electronic desk computer Pending JPS5676864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16200080A JPS5676864A (en) 1980-11-19 1980-11-19 Combined device of electronic clocking device and electronic desk computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16200080A JPS5676864A (en) 1980-11-19 1980-11-19 Combined device of electronic clocking device and electronic desk computer

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP3894780A Division JPS55129849A (en) 1980-03-28 1980-03-28 Electronic desk top calculator with electronic timing unit

Publications (1)

Publication Number Publication Date
JPS5676864A true JPS5676864A (en) 1981-06-24

Family

ID=15746123

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16200080A Pending JPS5676864A (en) 1980-11-19 1980-11-19 Combined device of electronic clocking device and electronic desk computer

Country Status (1)

Country Link
JP (1) JPS5676864A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4834642A (en) * 1971-09-07 1973-05-21

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4834642A (en) * 1971-09-07 1973-05-21

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