JPS5547529A - Response system of communication control device - Google Patents

Response system of communication control device

Info

Publication number
JPS5547529A
JPS5547529A JP11922078A JP11922078A JPS5547529A JP S5547529 A JPS5547529 A JP S5547529A JP 11922078 A JP11922078 A JP 11922078A JP 11922078 A JP11922078 A JP 11922078A JP S5547529 A JPS5547529 A JP S5547529A
Authority
JP
Japan
Prior art keywords
processing portion
terminal
response
circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11922078A
Other languages
Japanese (ja)
Inventor
Hiromu Nakase
Masao Akiba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11922078A priority Critical patent/JPS5547529A/en
Publication of JPS5547529A publication Critical patent/JPS5547529A/en
Pending legal-status Critical Current

Links

Landscapes

  • Computer And Data Communications (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE: To prevent the error recognition of the terminal that the center can not be used by automatically responding to the terminal by the communication control device in case there is generated temporarily the response delay in the central portion.
CONSTITUTION: The circuit corresponding portion 1 for carrying out the receipt or transmission of the data to the circuit or disassembling and asembling of the character is connected to a control processing portion 2 for integrating and controlling the whole device and a response processing portion 3 for producing a response to the terminal. The processing portion 2 is connected to the processing portion 3 and the channel processing portion 4 for carrying out the control in receipt and transmission of data to CPU. The initiation from the terminal is transmitted to the processing portion 2 by the signal A, while in the processing portion 3, in case the command E does not come within a predetermined time T after the command D is received during CPU performs another processing, the signal C is generated in order to carry out the judgement of non-response by the terminal and C is transmitted as the response signal ACK through the circuit processing portion 1 to maintain the connecting condition with the terminal.
COPYRIGHT: (C)1980,JPO&Japio
JP11922078A 1978-09-29 1978-09-29 Response system of communication control device Pending JPS5547529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11922078A JPS5547529A (en) 1978-09-29 1978-09-29 Response system of communication control device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11922078A JPS5547529A (en) 1978-09-29 1978-09-29 Response system of communication control device

Publications (1)

Publication Number Publication Date
JPS5547529A true JPS5547529A (en) 1980-04-04

Family

ID=14755921

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11922078A Pending JPS5547529A (en) 1978-09-29 1978-09-29 Response system of communication control device

Country Status (1)

Country Link
JP (1) JPS5547529A (en)

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