JPS553692A - Container for semiconductor device - Google Patents

Container for semiconductor device

Info

Publication number
JPS553692A
JPS553692A JP5874579A JP5874579A JPS553692A JP S553692 A JPS553692 A JP S553692A JP 5874579 A JP5874579 A JP 5874579A JP 5874579 A JP5874579 A JP 5874579A JP S553692 A JPS553692 A JP S553692A
Authority
JP
Japan
Prior art keywords
container
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5874579A
Other languages
English (en)
Japanese (ja)
Inventor
Romaano Ruiji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
ATES Componenti Elettronici SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ATES Componenti Elettronici SpA filed Critical ATES Componenti Elettronici SpA
Publication of JPS553692A publication Critical patent/JPS553692A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Casings For Electric Apparatus (AREA)
JP5874579A 1978-05-16 1979-05-15 Container for semiconductor device Pending JPS553692A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT23432/78A IT1095885B (it) 1978-05-16 1978-05-16 Contenitore in metallo e resina ad elevata ermeticita'per dispositivo a semiconduttore

Publications (1)

Publication Number Publication Date
JPS553692A true JPS553692A (en) 1980-01-11

Family

ID=11207026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5874579A Pending JPS553692A (en) 1978-05-16 1979-05-15 Container for semiconductor device

Country Status (5)

Country Link
JP (1) JPS553692A (de)
DE (2) DE7914024U1 (de)
FR (1) FR2426333A1 (de)
GB (1) GB2021315A (de)
IT (1) IT1095885B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT8224533A0 (it) * 1982-12-01 1982-12-01 Ora Sgs Microelettronica Spa S Contenitore in metallo e resina ad elevata affidabilita' per dispositivo a semiconduttore.
DE4401588C2 (de) * 1994-01-20 2003-02-20 Gemplus Gmbh Verfahren zum Verkappen eines Chipkarten-Moduls und Chipkarten-Modul
DE102010005771B4 (de) * 2010-01-25 2012-12-13 Heraeus Materials Technology Gmbh & Co. Kg Modulares Metallband, Verfahren zur seiner Herstellung und Bauteil mit verbesserter Ebenheit

Also Published As

Publication number Publication date
DE2919540A1 (de) 1979-11-22
IT7823432A0 (it) 1978-05-16
FR2426333B3 (de) 1982-03-19
IT1095885B (it) 1985-08-17
GB2021315A (en) 1979-11-28
DE7914024U1 (de) 1983-04-07
FR2426333A1 (fr) 1979-12-14

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