JPS5535521A - Pilot signal eliminator for stereoreceiver - Google Patents

Pilot signal eliminator for stereoreceiver

Info

Publication number
JPS5535521A
JPS5535521A JP10836378A JP10836378A JPS5535521A JP S5535521 A JPS5535521 A JP S5535521A JP 10836378 A JP10836378 A JP 10836378A JP 10836378 A JP10836378 A JP 10836378A JP S5535521 A JPS5535521 A JP S5535521A
Authority
JP
Japan
Prior art keywords
signal
circuit
pilot signal
input
19khz
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10836378A
Other languages
Japanese (ja)
Inventor
Junichi Hikita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Toyo Electronics Industry Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd, Toyo Electronics Industry Corp filed Critical Rohm Co Ltd
Priority to JP10836378A priority Critical patent/JPS5535521A/en
Publication of JPS5535521A publication Critical patent/JPS5535521A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving
    • H04H40/72—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving for noise suppression
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/1646—Circuits adapted for the reception of stereophonic signals
    • H04B1/1653—Detection of the presence of stereo signals and pilot signal regeneration

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To generate a signal in the same frequency as the pilot signal of 19KHz of FM stereobroadcasting and in the reverse phase, which is added to the input stage of a demodulation circuit to eliminate the pilot signal. CONSTITUTION:Output of an amplifier 1 to amplify a compound signal with output from a FM detection circuit as its input, becomes each input of a demodulation circuit 2, a detection circuit 11 and a phase lock loop (consisting of circuit 3-8) that is locked frequencywise to 19KHz. 38KHz signal of a frequency divider 7 is given to switching element of the demodulater circuit 2. The reverse phase signal of 19KHz of FF 15 becomes a cycle signal of the detector circuit 11, and at the same time, becomes input signal of AGC amplifier 14. Output of the detector circuit 11 is converted into DC signal by a low pass filter 12, amplified by an amplifier 13, and applied to the AGC amplifier as a control signal. The AGC amplifier supplies the reverse phase pilot signal in proportion to the pilot signal to the demodulator circuit 2 to implement elimination of the pilot signal.
JP10836378A 1978-09-04 1978-09-04 Pilot signal eliminator for stereoreceiver Pending JPS5535521A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10836378A JPS5535521A (en) 1978-09-04 1978-09-04 Pilot signal eliminator for stereoreceiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10836378A JPS5535521A (en) 1978-09-04 1978-09-04 Pilot signal eliminator for stereoreceiver

Publications (1)

Publication Number Publication Date
JPS5535521A true JPS5535521A (en) 1980-03-12

Family

ID=14482839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10836378A Pending JPS5535521A (en) 1978-09-04 1978-09-04 Pilot signal eliminator for stereoreceiver

Country Status (1)

Country Link
JP (1) JPS5535521A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5871742A (en) * 1981-10-26 1983-04-28 Matsushita Electric Ind Co Ltd Canceling circuit of pilot signal
JPS5951635A (en) * 1982-09-17 1984-03-26 Nec Corp Pilot signal eliminating circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5871742A (en) * 1981-10-26 1983-04-28 Matsushita Electric Ind Co Ltd Canceling circuit of pilot signal
JPS5951635A (en) * 1982-09-17 1984-03-26 Nec Corp Pilot signal eliminating circuit
JPS6337537B2 (en) * 1982-09-17 1988-07-26 Nippon Denki Kk

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