JPS553026A - Mode designation system for electronic cash register - Google Patents
Mode designation system for electronic cash registerInfo
- Publication number
- JPS553026A JPS553026A JP7465378A JP7465378A JPS553026A JP S553026 A JPS553026 A JP S553026A JP 7465378 A JP7465378 A JP 7465378A JP 7465378 A JP7465378 A JP 7465378A JP S553026 A JPS553026 A JP S553026A
- Authority
- JP
- Japan
- Prior art keywords
- display
- signal
- cpu
- mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To obtain the coincided mode state by memorizing previously the fixed numerical value in accordance with each mode of the register, adjustment and others and then comparing the value supplied with that memorized previously when the mode is designated.
CONSTITUTION: In this system, data D of CPU21 plus row and column address terminals RA and CA are connected to each terminal of memory 22. The memory is composed of RAM and then designated for the reading/writing via signal R/W2 of the CPU. At the same time, terminal D of CPU along with CA are connected to the corresponding terminals of I/O boat 23, and signal AO is applied from the CPU to switch the information supplied to the poeration seed via the column address information. Input, print and display buffers 23aW23c are provided within the I/O port with connection of key input, display and print parts 24W26. With the key operation, input signal KI is applied to the buffer via timing signal KP. And the display part performs the display, and the print part carries out printing onto the paper.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7465378A JPS5942346B2 (en) | 1978-06-20 | 1978-06-20 | Mode specification method for electronic cash registers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7465378A JPS5942346B2 (en) | 1978-06-20 | 1978-06-20 | Mode specification method for electronic cash registers |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS553026A true JPS553026A (en) | 1980-01-10 |
JPS5942346B2 JPS5942346B2 (en) | 1984-10-15 |
Family
ID=13553395
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7465378A Expired JPS5942346B2 (en) | 1978-06-20 | 1978-06-20 | Mode specification method for electronic cash registers |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5942346B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5878283A (en) * | 1981-09-29 | 1983-05-11 | マース・インコーポレーテツド | Coin processor |
-
1978
- 1978-06-20 JP JP7465378A patent/JPS5942346B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5878283A (en) * | 1981-09-29 | 1983-05-11 | マース・インコーポレーテツド | Coin processor |
Also Published As
Publication number | Publication date |
---|---|
JPS5942346B2 (en) | 1984-10-15 |
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