JPS5527751A - Error detection circuit - Google Patents
Error detection circuitInfo
- Publication number
- JPS5527751A JPS5527751A JP10075478A JP10075478A JPS5527751A JP S5527751 A JPS5527751 A JP S5527751A JP 10075478 A JP10075478 A JP 10075478A JP 10075478 A JP10075478 A JP 10075478A JP S5527751 A JPS5527751 A JP S5527751A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- decoder
- signal
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Detection And Correction Of Errors (AREA)
Abstract
PURPOSE: To prevent the decoding of the output signal to the erroneous position as well as the error of the double output by connecting both the odd-even decision circuit and the encoder circuit to the output of the decoder and then comparing the encoded signal with the input signal of the decoder.
CONSTITUTION: The binary data to be decoded is applied to input terminals A, B and C of decoder 100 as well as to comparator circuit 103 via signal line 201 to detect the agreement or disagreement of the signals. Then output signals 210 ∼ 217 of decoder 100 are applied to odd-even check circuit 101 via signal line 205 as well as to encoder circuit 102 via signal line 206 to give the binary encoding to the input signal. After this, output signal 218 is applied to circuit 103. And if an agreement is secured, output signal 208 of circuit 103 is turned to logic "1" and accordingly output signal 207 of circuit 101 is also turned to logic "1" with output signal 209 of NAND circuit 104 connected to circuit 101 turned to logic "0" respectively, thus the normal state being indicated.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10075478A JPS5527751A (en) | 1978-08-17 | 1978-08-17 | Error detection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10075478A JPS5527751A (en) | 1978-08-17 | 1978-08-17 | Error detection circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5527751A true JPS5527751A (en) | 1980-02-28 |
Family
ID=14282297
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10075478A Pending JPS5527751A (en) | 1978-08-17 | 1978-08-17 | Error detection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5527751A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58137344A (en) * | 1982-02-09 | 1983-08-15 | Nec Corp | Route discrimination signal generating circuit |
US4951994A (en) * | 1986-10-27 | 1990-08-28 | Tsutomu Miwa | Suspended type air-dam skirt |
DE4127920A1 (en) * | 1990-08-23 | 1992-04-09 | Fuji Xerox Co Ltd | IMAGE CODING DEVICE |
DE4192982C2 (en) * | 1990-11-21 | 1994-05-26 | Motorola Inc | Fault detection system |
-
1978
- 1978-08-17 JP JP10075478A patent/JPS5527751A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58137344A (en) * | 1982-02-09 | 1983-08-15 | Nec Corp | Route discrimination signal generating circuit |
US4951994A (en) * | 1986-10-27 | 1990-08-28 | Tsutomu Miwa | Suspended type air-dam skirt |
DE4127920A1 (en) * | 1990-08-23 | 1992-04-09 | Fuji Xerox Co Ltd | IMAGE CODING DEVICE |
DE4192982C2 (en) * | 1990-11-21 | 1994-05-26 | Motorola Inc | Fault detection system |
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