JPS5526789A - Oscillation circuit - Google Patents

Oscillation circuit

Info

Publication number
JPS5526789A
JPS5526789A JP10039378A JP10039378A JPS5526789A JP S5526789 A JPS5526789 A JP S5526789A JP 10039378 A JP10039378 A JP 10039378A JP 10039378 A JP10039378 A JP 10039378A JP S5526789 A JPS5526789 A JP S5526789A
Authority
JP
Japan
Prior art keywords
comparator
switch
input terminal
terminal voltage
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10039378A
Other languages
Japanese (ja)
Inventor
Hisashi Katafuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10039378A priority Critical patent/JPS5526789A/en
Publication of JPS5526789A publication Critical patent/JPS5526789A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain definite synchronous oscillation by making an oscillation frequency synchronism adjustment point depend upon an external synchronous signal input level, by providing a current Miller circuit to the vertical synchronizing saw-tooth wave deflecting signal oscillation circuit of a TV receiver. CONSTITUTION:When 1st switch 16 is OFF while 2nd switch 25 is ON, capacitor C18 is charged up to a constant value and then the output of comparator 19 is inverted, and C18 is charged with switch 25 OFF while switch 16 is ON. At this time, transistor Tr26 turns ON and the plus input terminal voltage of comparator 19 falls from VH at the time of charge down to VL. When the minus input terminal voltage of comparator 19 falls down to approximate VL due to the discharge of C18, an external synchronizing signal is inputted and flows through current Miller circuit 40, causing the plus input terminal voltage of comparator 19 to rise by DELTAVL. Consequently, the output of the comparator is inverted. Timing (t1) or (t2) of this sybchronization depends upon the plus input terminal voltage VL level of the comparator and synchronizing signal output waveform DELTAVL of circuit 40 superposed upon it, so that definite synchronous oscillation will be carried out.
JP10039378A 1978-08-17 1978-08-17 Oscillation circuit Pending JPS5526789A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10039378A JPS5526789A (en) 1978-08-17 1978-08-17 Oscillation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10039378A JPS5526789A (en) 1978-08-17 1978-08-17 Oscillation circuit

Publications (1)

Publication Number Publication Date
JPS5526789A true JPS5526789A (en) 1980-02-26

Family

ID=14272737

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10039378A Pending JPS5526789A (en) 1978-08-17 1978-08-17 Oscillation circuit

Country Status (1)

Country Link
JP (1) JPS5526789A (en)

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