JPS5683178A - Generating circuit for television vertical deflection signal - Google Patents
Generating circuit for television vertical deflection signalInfo
- Publication number
- JPS5683178A JPS5683178A JP15990879A JP15990879A JPS5683178A JP S5683178 A JPS5683178 A JP S5683178A JP 15990879 A JP15990879 A JP 15990879A JP 15990879 A JP15990879 A JP 15990879A JP S5683178 A JPS5683178 A JP S5683178A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- switch
- output
- comparator
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Details Of Television Scanning (AREA)
Abstract
PURPOSE:To make adjustment free for the oscillating period with a simple circuit constitution, by turning off a charging switch for capacitor in synchronizing with the double frequency pulse for horizontal deflection and turning on the discharge circuit through the reception of the vertical synchronizing signal. CONSTITUTION:When a voltage Vcc is fed, the output of a comparator 1 is at H, the switch 5 is ON with this H output, and further high constant voltage Ep2 is given to the + terminal. The H output of the comparator 1 turns on the charging current circuit switch 7 via the latch 6. Thus, the voltage R at the output terminal 10 of the charging capacitor 9 is rapidly increased. When this voltage R exceeds the voltage Ep2, the output of the comparator 1 is at L to turn off the switch 7 in synchronizing with the clock in double frequency as the horizontal deflection frequency fH. After turning off of the switch 7, when the voltage R is a given voltage or lower, the output of the comparator 1 is at 1 to obtain the oscillation waveform in saw tooth shape at the terminal 10. On the other hand, when the synchronizing signal is given to the vertical synchronizing signal input terminal 16, the switch 14 is ON and the discharge of the capacitor 9 is accelerated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15990879A JPS5683178A (en) | 1979-12-10 | 1979-12-10 | Generating circuit for television vertical deflection signal |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15990879A JPS5683178A (en) | 1979-12-10 | 1979-12-10 | Generating circuit for television vertical deflection signal |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5683178A true JPS5683178A (en) | 1981-07-07 |
Family
ID=15703788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15990879A Pending JPS5683178A (en) | 1979-12-10 | 1979-12-10 | Generating circuit for television vertical deflection signal |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5683178A (en) |
-
1979
- 1979-12-10 JP JP15990879A patent/JPS5683178A/en active Pending
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