JPS55161422A - Offset compensating circuit - Google Patents

Offset compensating circuit

Info

Publication number
JPS55161422A
JPS55161422A JP6880279A JP6880279A JPS55161422A JP S55161422 A JPS55161422 A JP S55161422A JP 6880279 A JP6880279 A JP 6880279A JP 6880279 A JP6880279 A JP 6880279A JP S55161422 A JPS55161422 A JP S55161422A
Authority
JP
Japan
Prior art keywords
offset
signal
components
output
feedback voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6880279A
Other languages
Japanese (ja)
Other versions
JPS5952574B2 (en
Inventor
Michinobu Ohata
Toshihiko Matsumura
Masao Yamazawa
Takafumi Nakajo
Masayuki Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54068802A priority Critical patent/JPS5952574B2/en
Priority to US06/227,094 priority patent/US4377759A/en
Priority to PCT/JP1980/000084 priority patent/WO1980002347A1/en
Priority to DE19803041417 priority patent/DE3041417T/de
Priority to GB8039594A priority patent/GB2062393B/en
Publication of JPS55161422A publication Critical patent/JPS55161422A/en
Publication of JPS5952574B2 publication Critical patent/JPS5952574B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • H04L25/065Binary decisions
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of DC offset
    • H04L25/063Setting decision thresholds using feedback techniques only
    • H04L25/064Subtraction of the threshold from the signal, which is then compared to a supplementary fixed threshold
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Analogue/Digital Conversion (AREA)
  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)

Abstract

PURPOSE:To reduce distortion of an original input analogue signal, by extracting only offset components from the output digitial signal of a sharp fluctuation and by generating a large time constant equivalently by a counter to perform offset compensation. CONSTITUTION:Buffer means 20 does not respond to fluctuation based on sound components of output digital signal Dout but responds to DC components caused by offset of signal Dout to output control signal D (consisting of D1 and D2). Signal D starts integrating circuit 13 to apply a negative feedback voltage and a positive feedback voltage to analogue adder 11 for positive offset and negative offset respectively. Control circuit 23 outputs control signals D1 and D2. Signals D1 and D2 are input to integrating circuit 13. Sign bit S in register 21 indicates the polarity and is updated for every sampling.
JP54068802A 1979-04-25 1979-06-04 offset compensation circuit Expired JPS5952574B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP54068802A JPS5952574B2 (en) 1979-06-04 1979-06-04 offset compensation circuit
US06/227,094 US4377759A (en) 1979-04-25 1980-04-23 Offset compensating circuit
PCT/JP1980/000084 WO1980002347A1 (en) 1979-04-25 1980-04-23 Offset compensating circuit
DE19803041417 DE3041417T (en) 1979-04-25 1980-04-23
GB8039594A GB2062393B (en) 1979-04-25 1980-04-23 Offset compensating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54068802A JPS5952574B2 (en) 1979-06-04 1979-06-04 offset compensation circuit

Publications (2)

Publication Number Publication Date
JPS55161422A true JPS55161422A (en) 1980-12-16
JPS5952574B2 JPS5952574B2 (en) 1984-12-20

Family

ID=13384207

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54068802A Expired JPS5952574B2 (en) 1979-04-25 1979-06-04 offset compensation circuit

Country Status (1)

Country Link
JP (1) JPS5952574B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5838030A (en) * 1981-07-03 1983-03-05 テキサス・インスツルメンツ・ドイツチエランド・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツンク Circuit stucture for converting analog ac voltage signal to digital signal
JPS60134526A (en) * 1983-12-21 1985-07-17 Mitsubishi Electric Corp Electronic integrating measuring instrument

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0119336Y2 (en) * 1984-12-17 1989-06-05

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5838030A (en) * 1981-07-03 1983-03-05 テキサス・インスツルメンツ・ドイツチエランド・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツンク Circuit stucture for converting analog ac voltage signal to digital signal
JPS60134526A (en) * 1983-12-21 1985-07-17 Mitsubishi Electric Corp Electronic integrating measuring instrument
JPH0113247B2 (en) * 1983-12-21 1989-03-06 Mitsubishi Electric Corp

Also Published As

Publication number Publication date
JPS5952574B2 (en) 1984-12-20

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