JPS55153431A - Analog memory - Google Patents
Analog memoryInfo
- Publication number
- JPS55153431A JPS55153431A JP6184179A JP6184179A JPS55153431A JP S55153431 A JPS55153431 A JP S55153431A JP 6184179 A JP6184179 A JP 6184179A JP 6184179 A JP6184179 A JP 6184179A JP S55153431 A JPS55153431 A JP S55153431A
- Authority
- JP
- Japan
- Prior art keywords
- counter
- memory
- power supply
- output
- presettable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
- H03K21/403—Arrangements for storing the counting state in case of power supply interruption
Abstract
PURPOSE:To effectively use this memory for the sound volume control for a TV receiver, by providing the non-volatile memory and presettable reversible counter so that the data before the interruption can be obtained as output when the power supply is reapplied. CONSTITUTION:The presettable reversible counter 11 and semiconductor non- volatile memory (M-NOS memory) 20 having the same number of bits are provided. Further, the output of the chattering prevention circuits 6, 7 is connected to the up down input terminal up, down of the counter 11 through the AND circuits 9, 10 together with the output of the oscillation circuit 1. Further, the switch 22 in interlocking with the power supply switch is connected to the pulse generating circuit 23, which produces the preset pulse presetting the data at the read-out terminals 01, 02, 03...0n of the memory 20 to the counter 11 after each power supply is stable and is connected to the preset terminal P0 of the counter 11.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6184179A JPS55153431A (en) | 1979-05-18 | 1979-05-18 | Analog memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6184179A JPS55153431A (en) | 1979-05-18 | 1979-05-18 | Analog memory |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55153431A true JPS55153431A (en) | 1980-11-29 |
JPS6244725B2 JPS6244725B2 (en) | 1987-09-22 |
Family
ID=13182710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6184179A Granted JPS55153431A (en) | 1979-05-18 | 1979-05-18 | Analog memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55153431A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5824243A (en) * | 1981-07-16 | 1983-02-14 | アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド | Non-volatile storage counter |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5054955U (en) * | 1973-09-17 | 1975-05-24 |
-
1979
- 1979-05-18 JP JP6184179A patent/JPS55153431A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5054955U (en) * | 1973-09-17 | 1975-05-24 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5824243A (en) * | 1981-07-16 | 1983-02-14 | アイテイ−テイ−・インダストリ−ズ・インコ−ポレ−テツド | Non-volatile storage counter |
JPH0252894B2 (en) * | 1981-07-16 | 1990-11-15 | Itt |
Also Published As
Publication number | Publication date |
---|---|
JPS6244725B2 (en) | 1987-09-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS52153630A (en) | Semiconductor memory device | |
JPS55153431A (en) | Analog memory | |
JPS52152129A (en) | Memory signal detection-amplification unit | |
JPS5754430A (en) | Integrated circuit | |
JPS5612124A (en) | External signal off delay timer unit | |
JPS5429534A (en) | Adding system of optional functions to composite terminal | |
JPS5342848A (en) | Current limiting circuit for two wire type transmitter | |
JPS57119527A (en) | Radio with digital clock | |
JPS5521656A (en) | Pulse generation circuit | |
JPS5315051A (en) | Chattering absorbing circuit of contacts | |
JPS54818A (en) | Signal input device | |
JPS5541019A (en) | Logical output circuit | |
JPS5616225A (en) | Input selection circuit for microcomputer | |
JPS5256571A (en) | Electronic digital timepiece | |
JPS5217732A (en) | Integrated circuit unit | |
JPS5333040A (en) | Delay circuit | |
JPS55160896A (en) | Program timer | |
JPS5332663A (en) | Numeric setting unit | |
JPS52154672A (en) | Timer device | |
JPS5342627A (en) | Power switch circuit | |
JPS5438544A (en) | Constant voltage normally supply unit | |
JPS53129572A (en) | Memory circuit | |
JPS5758206A (en) | Address circuit of memory | |
JPS52154307A (en) | Initial state setting circuit | |
JPS5317230A (en) | Delay circuit |