JPS55147850A - Loop system controlling system - Google Patents

Loop system controlling system

Info

Publication number
JPS55147850A
JPS55147850A JP5573079A JP5573079A JPS55147850A JP S55147850 A JPS55147850 A JP S55147850A JP 5573079 A JP5573079 A JP 5573079A JP 5573079 A JP5573079 A JP 5573079A JP S55147850 A JPS55147850 A JP S55147850A
Authority
JP
Japan
Prior art keywords
signal
node
gate
loop
time width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5573079A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6249775B2 (enrdf_load_stackoverflow
Inventor
Minoru Hatada
Kunio Hiyama
Koichi Ihara
Tokuyuki Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5573079A priority Critical patent/JPS55147850A/ja
Publication of JPS55147850A publication Critical patent/JPS55147850A/ja
Publication of JPS6249775B2 publication Critical patent/JPS6249775B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/437—Ring fault isolation or reconfiguration

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
JP5573079A 1979-05-09 1979-05-09 Loop system controlling system Granted JPS55147850A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5573079A JPS55147850A (en) 1979-05-09 1979-05-09 Loop system controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5573079A JPS55147850A (en) 1979-05-09 1979-05-09 Loop system controlling system

Publications (2)

Publication Number Publication Date
JPS55147850A true JPS55147850A (en) 1980-11-18
JPS6249775B2 JPS6249775B2 (enrdf_load_stackoverflow) 1987-10-21

Family

ID=13006964

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5573079A Granted JPS55147850A (en) 1979-05-09 1979-05-09 Loop system controlling system

Country Status (1)

Country Link
JP (1) JPS55147850A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6249775B2 (enrdf_load_stackoverflow) 1987-10-21

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