JPS55136788A - Asymmetrical control system for time sharing network - Google Patents

Asymmetrical control system for time sharing network

Info

Publication number
JPS55136788A
JPS55136788A JP4468679A JP4468679A JPS55136788A JP S55136788 A JPS55136788 A JP S55136788A JP 4468679 A JP4468679 A JP 4468679A JP 4468679 A JP4468679 A JP 4468679A JP S55136788 A JPS55136788 A JP S55136788A
Authority
JP
Japan
Prior art keywords
memories
signal
write
time sharing
spmf1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4468679A
Other languages
Japanese (ja)
Other versions
JPS5753710B2 (en
Inventor
Shunichi Naito
Toru Masuda
Yukio Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4468679A priority Critical patent/JPS55136788A/en
Publication of JPS55136788A publication Critical patent/JPS55136788A/en
Publication of JPS5753710B2 publication Critical patent/JPS5753710B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To enable to avoid interference, by inhibiting the double write-in of the signal to the bus memory with the write-in control bit of the control memory and performing asymmetrical connection of the time sharing circuit network. CONSTITUTION:The bus memories SPMF1...SPMFn store the signal in time sharing multiplex, the control memories CM1...CMn write in the signal to the memories SPMF1...SPMFn in arbitrary address, and the counter CTR sequentially reads out the signal from the memories SPMF1...SPMFn. Further, the bus memories, control memories and counters are provided at the output side of the time sharing network. Further, the memories CM1...CMn are provided with the write- in control bit WI inhibit or enable the write-in of the signal to the memories SPMF1...SPMFn,and the control bit WI inhibits the double write-in of the signal to the memories SPMF1...SOMFn, for asymmetrical connection to the time sharing circuit network. Thus, interference can be avoided.
JP4468679A 1979-04-12 1979-04-12 Asymmetrical control system for time sharing network Granted JPS55136788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4468679A JPS55136788A (en) 1979-04-12 1979-04-12 Asymmetrical control system for time sharing network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4468679A JPS55136788A (en) 1979-04-12 1979-04-12 Asymmetrical control system for time sharing network

Publications (2)

Publication Number Publication Date
JPS55136788A true JPS55136788A (en) 1980-10-24
JPS5753710B2 JPS5753710B2 (en) 1982-11-15

Family

ID=12698303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4468679A Granted JPS55136788A (en) 1979-04-12 1979-04-12 Asymmetrical control system for time sharing network

Country Status (1)

Country Link
JP (1) JPS55136788A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57181294A (en) * 1981-04-23 1982-11-08 Western Electric Co Signal transmitting circuit

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60127015U (en) * 1984-02-03 1985-08-27 キンセキ株式会社 crystal oscillator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57181294A (en) * 1981-04-23 1982-11-08 Western Electric Co Signal transmitting circuit
JPH0568158B2 (en) * 1981-04-23 1993-09-28 At & T Technologies Inc

Also Published As

Publication number Publication date
JPS5753710B2 (en) 1982-11-15

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