JPS55134402A - Process control unit - Google Patents

Process control unit

Info

Publication number
JPS55134402A
JPS55134402A JP4089479A JP4089479A JPS55134402A JP S55134402 A JPS55134402 A JP S55134402A JP 4089479 A JP4089479 A JP 4089479A JP 4089479 A JP4089479 A JP 4089479A JP S55134402 A JPS55134402 A JP S55134402A
Authority
JP
Japan
Prior art keywords
processing units
control unit
circuits
process control
themselves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4089479A
Other languages
Japanese (ja)
Inventor
Haruji Tazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4089479A priority Critical patent/JPS55134402A/en
Publication of JPS55134402A publication Critical patent/JPS55134402A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make a process control unit high-reliability by making central processing units duplex.
CONSTITUTION: Processing units 1 and 2 exchange process operation information through communication control unit 3. Processing units 1 and 2 exchange signals with devices 11W14 through repeating points 5W10 and output line 15. 19 And 20 in the figure indicate manual/automatic switching circuits, and the possessory right of I/O circuits is determined by selection circuits 17 and 18 in case of manual operations. The anomaly signal of processing units 1 and 2 themselves is inputted as an interrupt input to processing units of each other through OR circuit 16 between selection circuits 17 and 18 mutually. Processing units 1 and 2 take in this interrupt input and the selection signal to decide whether they obtain the I/O operation execution right to start the process control operation or transfer the I/O operation execution right, which has been occupied by themselves, to the processing units of each other and wait.
COPYRIGHT: (C)1980,JPO&Japio
JP4089479A 1979-04-06 1979-04-06 Process control unit Pending JPS55134402A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4089479A JPS55134402A (en) 1979-04-06 1979-04-06 Process control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4089479A JPS55134402A (en) 1979-04-06 1979-04-06 Process control unit

Publications (1)

Publication Number Publication Date
JPS55134402A true JPS55134402A (en) 1980-10-20

Family

ID=12593208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4089479A Pending JPS55134402A (en) 1979-04-06 1979-04-06 Process control unit

Country Status (1)

Country Link
JP (1) JPS55134402A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191002A (en) * 1982-04-30 1983-11-08 Mitsubishi Electric Corp Arithmetic processor of plant controller
JPH0193219A (en) * 1987-10-05 1989-04-12 Hitachi Ltd System switching system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58191002A (en) * 1982-04-30 1983-11-08 Mitsubishi Electric Corp Arithmetic processor of plant controller
JPH0193219A (en) * 1987-10-05 1989-04-12 Hitachi Ltd System switching system

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