JPS5512764A - Semiconductor device manufacturing method - Google Patents

Semiconductor device manufacturing method

Info

Publication number
JPS5512764A
JPS5512764A JP8578578A JP8578578A JPS5512764A JP S5512764 A JPS5512764 A JP S5512764A JP 8578578 A JP8578578 A JP 8578578A JP 8578578 A JP8578578 A JP 8578578A JP S5512764 A JPS5512764 A JP S5512764A
Authority
JP
Japan
Prior art keywords
lead
die pad
prescribed
suspended
pad section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8578578A
Other languages
Japanese (ja)
Other versions
JPS6210019B2 (en
Inventor
Hideji Aoki
Yutaka Morita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP8578578A priority Critical patent/JPS5512764A/en
Publication of JPS5512764A publication Critical patent/JPS5512764A/en
Publication of JPS6210019B2 publication Critical patent/JPS6210019B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Abstract

PURPOSE: To sink a die pad in a stablized manner and to a required shape and dimensions by folding a suspension lead, which connects frame section of a lead frame to a die pad section to which a semiconductor element is soldered and rolling both ends of the suspension lead.
CONSTITUTION: A suspended lead 3 is pressed and folded by a punch 12 a die 13 and, at the same time, both ends of the suspended lead 3 are rolled by a rolling rod 14 by a prescribed reduction. As an elongation of a material required for bending and sinking of the die pad section 4 is given by the suspended lead 3, a prescribed bent shape is obtained and the die pad section 4 is sunken deeper than the lead by a prescribed amount.
COPYRIGHT: (C)1980,JPO&Japio
JP8578578A 1978-07-13 1978-07-13 Semiconductor device manufacturing method Granted JPS5512764A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8578578A JPS5512764A (en) 1978-07-13 1978-07-13 Semiconductor device manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8578578A JPS5512764A (en) 1978-07-13 1978-07-13 Semiconductor device manufacturing method

Publications (2)

Publication Number Publication Date
JPS5512764A true JPS5512764A (en) 1980-01-29
JPS6210019B2 JPS6210019B2 (en) 1987-03-04

Family

ID=13868531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8578578A Granted JPS5512764A (en) 1978-07-13 1978-07-13 Semiconductor device manufacturing method

Country Status (1)

Country Link
JP (1) JPS5512764A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60189957A (en) * 1984-03-12 1985-09-27 Toshiba Corp Manufacture of semiconductor device
JPS62193162A (en) * 1986-02-19 1987-08-25 Sumitomo Metal Mining Co Ltd Method for depression of lead frame
US5291059A (en) * 1991-11-18 1994-03-01 Mitsubishi Denki Kabushiki Kaisha Resin-molded semiconductor device and lead frame employed for fabricating the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60189957A (en) * 1984-03-12 1985-09-27 Toshiba Corp Manufacture of semiconductor device
JPS62193162A (en) * 1986-02-19 1987-08-25 Sumitomo Metal Mining Co Ltd Method for depression of lead frame
US5291059A (en) * 1991-11-18 1994-03-01 Mitsubishi Denki Kabushiki Kaisha Resin-molded semiconductor device and lead frame employed for fabricating the same

Also Published As

Publication number Publication date
JPS6210019B2 (en) 1987-03-04

Similar Documents

Publication Publication Date Title
DE2963058D1 (en) Large scale integrated circuit and method of fabricating the same
JPS54155782A (en) Method of fabricating semiconductor
JPS5512764A (en) Semiconductor device manufacturing method
JPS5494885A (en) Method of fabricating ic semiconductor
DE2860715D1 (en) Process for the production of fatty acid nitriles and glycerine from glycerides, in particular from natural fats and/or oils
JPS53141577A (en) Lead frame for integrated circuit
JPS5714423A (en) Drawing method for vibration diaphragm
JPS53125768A (en) Forning method of step type mesa construction in electronic device
JPS53110082A (en) Copper-clad aluminum wire
JPS5391577A (en) Manufacture of semiconductor device of resinsealing type
JPS5570426A (en) Punching die for helical gear
JPS5419652A (en) Lead bonding method
JPS5427772A (en) Production of semiconductor devices
JPS5575216A (en) Chip solid electrolytic condenser and method of fabricating same
JPS52142485A (en) Wire bonding device
JPS52147129A (en) Production method of ski
JPS56115552A (en) Semiconductor integrated circuit device
JPS533687A (en) Terminal screw with press down metal
JPS53142368A (en) Manufacturing method of metal and forming die for it
JPS54132176A (en) Method of fabricating semiconductor
JPS51148359A (en) Lead formation method of resin mold ic element
JPS5376660A (en) Method of connecting metal wites to semiconductor elements
JPS5587419A (en) Chip solid electrolytic condenser and method of fabricating same
JPS53110081A (en) Method of manufacturing composite strip
JPS5389662A (en) Material for lead frame of semiconductor device