JPS55117338A - Phase synchronous circuit - Google Patents
Phase synchronous circuitInfo
- Publication number
- JPS55117338A JPS55117338A JP2472879A JP2472879A JPS55117338A JP S55117338 A JPS55117338 A JP S55117338A JP 2472879 A JP2472879 A JP 2472879A JP 2472879 A JP2472879 A JP 2472879A JP S55117338 A JPS55117338 A JP S55117338A
- Authority
- JP
- Japan
- Prior art keywords
- attenuator
- detector
- phase synchronous
- level
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000001360 synchronised effect Effects 0.000 title abstract 6
- 230000010363 phase shift Effects 0.000 abstract 2
- 238000001514 detection method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/20—Automatic control
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To eliminate the phase shift which occurs the signal level of the phase synchronous circuit has a sudden increase by giving the control to the variable attenuator when the detection voltage of the second detector exceeds the prescribed level and thus lowering the input signal level of the phase synchronous loop. CONSTITUTION:The attenuation quantity of variable attenuator 7 is controlled by the output the orthogonal detector which forms the phase synchronous loop. Thus the attenuation quantity of attenuator 7 is varied to secure the constant and automatic amplitude control at all time for input signal 4. Then diode 14 is connected to the output of the second detector 12 of the phase synchronous loop via amplifier 13. And no operation is given to amplifier 13 and diode 14 which form the second phase synchronization to give the control to attenuator 7 in case the output of detector 12 is less than the prescribed level. Then attenuator 7 is controlled by the voltage of diode 14 when the output of detector 12 exceeds the prescribed level. Thus the level is lowered for input signal 4 of the phase synchronous loop, and as a result, no phase shift is caused although the preceding signal level of attenuator 7 may vary.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2472879A JPS55117338A (en) | 1979-03-02 | 1979-03-02 | Phase synchronous circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2472879A JPS55117338A (en) | 1979-03-02 | 1979-03-02 | Phase synchronous circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55117338A true JPS55117338A (en) | 1980-09-09 |
JPS6247374B2 JPS6247374B2 (en) | 1987-10-07 |
Family
ID=12146206
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2472879A Granted JPS55117338A (en) | 1979-03-02 | 1979-03-02 | Phase synchronous circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55117338A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0723037A (en) * | 1993-06-23 | 1995-01-24 | Nec Corp | Clock synchronizing circuit |
-
1979
- 1979-03-02 JP JP2472879A patent/JPS55117338A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0723037A (en) * | 1993-06-23 | 1995-01-24 | Nec Corp | Clock synchronizing circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6247374B2 (en) | 1987-10-07 |
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