JPS55117328A - Integrating type analog-digital converter - Google Patents

Integrating type analog-digital converter

Info

Publication number
JPS55117328A
JPS55117328A JP2395979A JP2395979A JPS55117328A JP S55117328 A JPS55117328 A JP S55117328A JP 2395979 A JP2395979 A JP 2395979A JP 2395979 A JP2395979 A JP 2395979A JP S55117328 A JPS55117328 A JP S55117328A
Authority
JP
Japan
Prior art keywords
voltage
amplifier
switch
output
cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2395979A
Other languages
Japanese (ja)
Other versions
JPH0144055B2 (en
Inventor
Masaoki Ishikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP2395979A priority Critical patent/JPS55117328A/en
Publication of JPS55117328A publication Critical patent/JPS55117328A/en
Publication of JPH0144055B2 publication Critical patent/JPH0144055B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06JHYBRID COMPUTING ARRANGEMENTS
    • G06J1/00Hybrid computing arrangements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/50Analogue/digital converters with intermediate conversion to time interval
    • H03M1/52Input signal integrated with linear return to datum

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Automation & Control Theory (AREA)
  • Evolutionary Computation (AREA)
  • Fuzzy Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To obtain a high-accuracy multiplier with the offset error erased by securing the perfect symmetry for the active waveform of the integrator to the plus and minus of the unknown voltage against the time axis and then securing the perfect coincidence for the conversion value of the unknown voltage featuring the same absolute value. CONSTITUTION:Unknown voltage Ex is applied continuously to OP amplifier A1, and switch S3 is driven every cycle of T0/2 to memorize the output of amplifier A1 into holding capacitor CS. At the same time, switches S4 and S5 of triangular wave generator TAG are opened at the beginning of the cycle, and then switch S5 is closed after time T since counter C4 counted clock phi. Then the negative voltage is integrated by OP amplifier A3, and switch S5 is opened when the waveform features cycle T0/2. And then the comparison is given through comparator CP1 between the output of the integrator consisting of capacitor CS and OP amplifier A2 and the triangular wave of generator TAG, and the output is inverted in the case of voltage Ex<0. And switch S2 is closed via control circuit CTL, and the reference voltage is set as -Er to turn the output of A2 negative. Thus the perfect coincidence is secured for the positive and negative waveforms of voltage Ex against the time axis.
JP2395979A 1979-03-01 1979-03-01 Integrating type analog-digital converter Granted JPS55117328A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2395979A JPS55117328A (en) 1979-03-01 1979-03-01 Integrating type analog-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2395979A JPS55117328A (en) 1979-03-01 1979-03-01 Integrating type analog-digital converter

Publications (2)

Publication Number Publication Date
JPS55117328A true JPS55117328A (en) 1980-09-09
JPH0144055B2 JPH0144055B2 (en) 1989-09-25

Family

ID=12125076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2395979A Granted JPS55117328A (en) 1979-03-01 1979-03-01 Integrating type analog-digital converter

Country Status (1)

Country Link
JP (1) JPS55117328A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161774A (en) * 1983-03-04 1984-09-12 Hitachi Ltd Multiplication type a/d converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161774A (en) * 1983-03-04 1984-09-12 Hitachi Ltd Multiplication type a/d converter
JPH0477350B2 (en) * 1983-03-04 1992-12-08 Hitachi Seisakusho Kk

Also Published As

Publication number Publication date
JPH0144055B2 (en) 1989-09-25

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