JPS551156A - Method of fabricating lead wire for use in semiconductor - Google Patents

Method of fabricating lead wire for use in semiconductor

Info

Publication number
JPS551156A
JPS551156A JP7469278A JP7469278A JPS551156A JP S551156 A JPS551156 A JP S551156A JP 7469278 A JP7469278 A JP 7469278A JP 7469278 A JP7469278 A JP 7469278A JP S551156 A JPS551156 A JP S551156A
Authority
JP
Japan
Prior art keywords
roll
precious metal
particles
group
wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7469278A
Other languages
English (en)
Inventor
Seiji Imanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7469278A priority Critical patent/JPS551156A/ja
Publication of JPS551156A publication Critical patent/JPS551156A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP7469278A 1978-06-19 1978-06-19 Method of fabricating lead wire for use in semiconductor Pending JPS551156A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7469278A JPS551156A (en) 1978-06-19 1978-06-19 Method of fabricating lead wire for use in semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7469278A JPS551156A (en) 1978-06-19 1978-06-19 Method of fabricating lead wire for use in semiconductor

Publications (1)

Publication Number Publication Date
JPS551156A true JPS551156A (en) 1980-01-07

Family

ID=13554521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7469278A Pending JPS551156A (en) 1978-06-19 1978-06-19 Method of fabricating lead wire for use in semiconductor

Country Status (1)

Country Link
JP (1) JPS551156A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158999A (ja) * 1983-12-22 1985-08-20 オイムコ・アクチエンゲゼルシヤフト・フユ−ル・マシ−ネンバウ 切換えクラツチと連続回転するはずみ車とを有するスピンドルプレス

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60158999A (ja) * 1983-12-22 1985-08-20 オイムコ・アクチエンゲゼルシヤフト・フユ−ル・マシ−ネンバウ 切換えクラツチと連続回転するはずみ車とを有するスピンドルプレス
JPH036877B2 (ja) * 1983-12-22 1991-01-31 Eumuco Ag Fuer Maschinenbau

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