JPS55110333A - Data collector - Google Patents

Data collector

Info

Publication number
JPS55110333A
JPS55110333A JP1813579A JP1813579A JPS55110333A JP S55110333 A JPS55110333 A JP S55110333A JP 1813579 A JP1813579 A JP 1813579A JP 1813579 A JP1813579 A JP 1813579A JP S55110333 A JPS55110333 A JP S55110333A
Authority
JP
Japan
Prior art keywords
hcpu
data collection
flp
interruption
host computer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1813579A
Other languages
Japanese (ja)
Inventor
Hitoshi Kobayashi
Shunji Matsuo
Nobuyuki Kawanabe
Junji Miyazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP1813579A priority Critical patent/JPS55110333A/en
Publication of JPS55110333A publication Critical patent/JPS55110333A/en
Pending legal-status Critical Current

Links

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  • Investigating Or Analysing Biological Materials (AREA)

Abstract

PURPOSE: To make it possible to continue data collection even if a fault would occur to a host computer and transmission circuit, by providing a data collection terminal, which has an external memory such as a floppy disk, between a sensor and the host computer.
CONSTITUTION: While host computer HCPU can not accept an interruption from data collection terminal DC or while HCPU and transmission circuit (l) are in trouble, data received from sensor SC are sequentially stored on floppy disk FLP and at the point in time when HCPU accepts the interruption, the contents of FLP are read and transferred in sequence. Then until there is no untransferred data residing on FLP, an interruption is caused from DC for every detection-body data. Thus, a load on DC viewed from the center side is made even and even if a fault would occur to HCPU and transmission circuit (l), DC can continue data collection.
COPYRIGHT: (C)1980,JPO&Japio
JP1813579A 1979-02-19 1979-02-19 Data collector Pending JPS55110333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1813579A JPS55110333A (en) 1979-02-19 1979-02-19 Data collector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1813579A JPS55110333A (en) 1979-02-19 1979-02-19 Data collector

Publications (1)

Publication Number Publication Date
JPS55110333A true JPS55110333A (en) 1980-08-25

Family

ID=11963150

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1813579A Pending JPS55110333A (en) 1979-02-19 1979-02-19 Data collector

Country Status (1)

Country Link
JP (1) JPS55110333A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49116903A (en) * 1973-03-10 1974-11-08

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49116903A (en) * 1973-03-10 1974-11-08

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