JPS55108981U - - Google Patents

Info

Publication number
JPS55108981U
JPS55108981U JP875879U JP875879U JPS55108981U JP S55108981 U JPS55108981 U JP S55108981U JP 875879 U JP875879 U JP 875879U JP 875879 U JP875879 U JP 875879U JP S55108981 U JPS55108981 U JP S55108981U
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP875879U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP875879U priority Critical patent/JPS55108981U/ja
Publication of JPS55108981U publication Critical patent/JPS55108981U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
JP875879U 1979-01-25 1979-01-25 Pending JPS55108981U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP875879U JPS55108981U (en) 1979-01-25 1979-01-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP875879U JPS55108981U (en) 1979-01-25 1979-01-25

Publications (1)

Publication Number Publication Date
JPS55108981U true JPS55108981U (en) 1980-07-30

Family

ID=28818327

Family Applications (1)

Application Number Title Priority Date Filing Date
JP875879U Pending JPS55108981U (en) 1979-01-25 1979-01-25

Country Status (1)

Country Link
JP (1) JPS55108981U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010107432A (en) * 2008-10-31 2010-05-13 Fuji Electric Systems Co Ltd Method of integrated test of semiconductor and semiconductor testing device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010107432A (en) * 2008-10-31 2010-05-13 Fuji Electric Systems Co Ltd Method of integrated test of semiconductor and semiconductor testing device

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