JPS55108976A - Electronic tape counter - Google Patents

Electronic tape counter

Info

Publication number
JPS55108976A
JPS55108976A JP1600579A JP1600579A JPS55108976A JP S55108976 A JPS55108976 A JP S55108976A JP 1600579 A JP1600579 A JP 1600579A JP 1600579 A JP1600579 A JP 1600579A JP S55108976 A JPS55108976 A JP S55108976A
Authority
JP
Japan
Prior art keywords
output
tape
lsi
com
increment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1600579A
Other languages
Japanese (ja)
Other versions
JPS5927992B2 (en
Inventor
Tatsuhisa Kahara
Susumu Sato
Toshiaki Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tamura Electric Works Ltd
Original Assignee
Tamura Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tamura Electric Works Ltd filed Critical Tamura Electric Works Ltd
Priority to JP54016005A priority Critical patent/JPS5927992B2/en
Publication of JPS55108976A publication Critical patent/JPS55108976A/en
Publication of JPS5927992B2 publication Critical patent/JPS5927992B2/en
Expired legal-status Critical Current

Links

Landscapes

  • Controlling Rewinding, Feeding, Winding, Or Abnormalities Of Webs (AREA)

Abstract

PURPOSE: To generate the zero output and the tape end detection output of an up/ down counter individually without increment of the number of pins of a LSI, by counting clock signals generated according to running of a tape and by using commonly the outputs above as the same terminal.
CONSTITUTION: Three-level control signals corresponding to need or no need of tape forward and backward running and zero output are generated as H, N and L by control circuit CNT. Meanwhile, a LSI is provided with up/down counter CUT, which generates the count output as data output DAT, and comparators COM1 and COM2 as the first and the second decision circuits, and the threshold level of comparator COM1 is set. The zero output and end output are obtained from the common circuit, so that the electronic tape counter can be stored in a case without increment of the number of pins even in case that it is made into a LSI, and the form of it may be the same form as the conventional one.
COPYRIGHT: (C)1980,JPO&Japio
JP54016005A 1979-02-16 1979-02-16 electronic tape counter Expired JPS5927992B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54016005A JPS5927992B2 (en) 1979-02-16 1979-02-16 electronic tape counter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54016005A JPS5927992B2 (en) 1979-02-16 1979-02-16 electronic tape counter

Publications (2)

Publication Number Publication Date
JPS55108976A true JPS55108976A (en) 1980-08-21
JPS5927992B2 JPS5927992B2 (en) 1984-07-10

Family

ID=11904486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54016005A Expired JPS5927992B2 (en) 1979-02-16 1979-02-16 electronic tape counter

Country Status (1)

Country Link
JP (1) JPS5927992B2 (en)

Also Published As

Publication number Publication date
JPS5927992B2 (en) 1984-07-10

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